W255
Serial Configuration Map
• The serial bits will be read by the clock driver in the following
order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
.
.
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
• Reserved and unused bits should be programmed to “0.”
• SMBus Address for the W255 is:
Table 1.
A6
1
A5
1
A4
0
A3
1
A2
0
A1
0
A0
1
R/W
----
Bit 2
Bit 1
Bit 0
10, 11
6, 7
4, 5
Byte 7: Outputs Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Pin #
30, 29
28, 27
21, 22
19, 20
15,16
Description
DDR7T, DDR7C
DDR6T, DDR6C
DDR5T_SDRAM8,
DDR5C_SDRAM9
DDR4T_SDRAM6,
DDR4C_SDRAM7
DDR3T_SDRAM4,
DDR3C_SDRAM5
DDR2T_SDRAM2,
DDR2C_SDRAM3
DDR1T_SDRAM0,
DDR1C_SDRAM1
DDR0T_SDRAM10,
DDR0C_SDRAM11
1
1
1
1
1
1
1
1
Default
Byte 6: Outputs Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
FBOUT
DDR11T, DDR11C
Default
0
0
0
1
1
1
1
1
Bit 7 –
Bit 6 –
Bit 5 –
Bit 4 1
Bit 3 45,44
Bit 2 43, 42 DDR10T, DDR10C
Bit 1 39, 38 DDR9T, DDR9C
Bit 0 34, 33 DDR8T, DDR8C
Rev 1.0, November 25, 2006
Page 3 of 9
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