SL15100
Input Capacitance
Load Capacitance
CIN2
CL
Pins 4 and 8
SSCLK/REFCLK , Pins 6 and 7
-
-
4
-
6
15
pF
pF
AC Electrical Characteristics (C-Grade)
Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range 0 to +85 Deg C
Parameter
Input Frequency Range
Input Frequency Range
Symbol
FIN1
FIN2
Condition
Crystal or Ceramic Resonator
External Clock
SSCLK
REFCLK, crystal or resonator input
REFCLK, clock input
SSCLK
REFCLK
Clock Input, Pin 3
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
CLKIN=SSCLK=166MHz,
2%Spread
REFCLK=Off
CLKIN=SSCLK=66MHz,
2%Spread, REFCLK=Off
CLKIN=SSCLK=33MHz,
2%Spread, REFCLK=Off
CLKIN=SSCLK=166MHz,
2%Spread REFCLK=On
CLKIN=SSCLK=66MHz,
2%Spread, REFCLK=On
Min
8
8
3
0.25
0.25
45
45
40
-
-
-
-
-
-
-
-
Typ
-
-
-
-
-
50
50
50
4.80
2.60
1.80
1.40
1.10
0.90
0.70
100
Max
48
166
200
48
166
55
55
60
5.80
3.10
2.20
1.70
1.35
1.10
0.85
130
Unit
MHz
MHz
MHz
MHz
MHz
%
%
%
ns
ns
ns
ns
ns
ns
ns
ps
Output Frequency Range
FOUT1
Output Frequency Range
FOUT2
Output Frequency Range
FOUT3
Output Duty Cycle
Output Duty Cycle
Input Duty Cycle
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
DC1
DC2
DCIN
tr/f1
tr/f2
tr/f3
tr/f4
tr/f5
tr/f6
tr/f7
CCJ1
CCJ2
CCJ3
CCJ4
CCJ5
-
-
-
-
110
130
110
115
140
170
140
150
ps
ps
ps
ps
Rev 1.8, August 10, 2007
Page 7 of 16
SPECTRALINEAR [ SPECTRALINEAR INC ]
