W137
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
Parameter
V
DD
, V
IN
T
STG
T
A
T
B
ESD
PROT
Description
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
Ambient Temperature under Bias
Input ESD Protection
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
periods may affect reliability.
.
Rating
–0.5 to +7.0
–65 to +150
0 to +70
–55 to +125
2 (min.)
Unit
V
°C
°C
°C
kV
DC Electrical Characteristics:
T
A
= 0°C to +70°C; V
DDQ3
= 3.3V±5%; V
DDQ2
= 2.5V±5%; CPU0:1 = 66.6/100 MHz
Parameter
Supply Current
I
DD3PD
I
DD3
I
DD2
I
DD2PD
V
IL
V
IH
I
IL
I
IH
I
IL
I
IH
V
OL
V
OH
V
OH
I
OL
3.3V Supply Current in Power-down mode
3.3V Supply Current
2.5V Supply Current
2.5V Supply Current in Power-down mode
Input Low Voltage
Input High Voltage
Input Low Current
[2]
Input High Current
[2]
Input Low Current (SEL100/66#)
Input High Current (SEL100/66#)
Output Low Voltage
Output High Voltage
Output High Voltage
Output Low Current:
PCI_F, PCI1:5,
REF0:1
CPU0:1
CPU0:1
PCI_F, PCI1:5
REF0:1
I
OH
Output High Current
CPU0:1
PCI_F, PCI1:5
REF0:1
Crystal Oscillator
V
TH
C
LOAD
C
IN,X1
X1 Input Threshold Voltage
[3]
Load Capacitance, As Seen by External Crystal
[4]
X1 Input Capacitance
[5]
Pin X2 unconnected
V
DDQ3
= 3.3V
1.65
14
28
V
pF
pF
I
OL
= 1 mA
I
OH
= –1 mA
I
OH
= –1 mA
V
OL
= 1.25V
V
OL
= 1.5V
V
OL
= 1.5V
V
OH
= 1.25V
V
OH
= 1.5V
V
OH
= 1.5V
3.1
2.2
80
70
50
80
70
50
120
110
70
120
110
70
180
140
90
180
140
90
PWR_DWN# = 0
Outputs Loaded
[1]
Outputs Loaded
[1]
PWR_DWN# = 0
GND – 0.3
2.0
1
80
30
0.2 µA
5
100
45
1
0.8
V
DD
+ 0.3
–25
10
–5
+5
50
mA
mA
mA
mA
V
V
µA
µA
µA
µA
mV
V
V
mA
mA
mA
mA
mA
mA
Description
Test Condition
Min.
Typ.
Max.
Unit
Logic Inputs
Clock Outputs
Notes:
1. All clock outputs loaded with 6" 60 transmission lines with 20-pF capacitors.
2. CPU_STOP#, PCI_STOP#, PWR_DWN#, SPREAD#, and SEL48# logic inputs have internal pull-up resistors (not CMOS level).
3. X1 input threshold voltage (typical) is V
DD
/2.
Rev 1.0, November 24, 2006
Page 5 of 8
SPECTRALINEAR [ SPECTRALINEAR INC ]
