W149
Writing Data Bytes
Each bit in Data Bytes 0–7 control a particular device function
except for the “reserved” bits which must be written as a logic
0. Bits are written MSB (most significant bit) first, which is bit 7.
Table 5
gives the bit formats for registers located in Data Bytes
0–7.
Table 5. Data Bytes 0–7 Serial Configuration Map
Affected Pin
Bit(s)
7
6
5
4
3
2
1–0
Pin No.
--
--
--
--
--
--
--
Pin Name
--
--
--
--
--
--
--
Don’t Care
SEL_2
SEL_1
SEL_0
Hardware/Software Frequency Select
Don’t Care
Bit 1
0
0
1
1
Bit 0
0
1
0
1
--
Function (See
Table 7
for function details)
Normal Operation
(Reserved)
Normal Operation
All Outputs Three-stated
--
--
--
--
Low
--
Low
Low
--
Low
--
Low
Low
Low
Low
Low
--
--
Low
Low
--
Low
--
--
--
--
Active
--
Active
Active
--
Active
--
Active
Active
Active
Active
Active
--
--
Active
Active
--
Active
Control Function
0
--
See
Table 6
See
Table 6
See
Table 6
Hardware
Software
--
Data Byte 0
--
0
0
0
0
0
0
00
Bit Control
1
Default
Table 6
details additional frequency selections that are
available through the serial data interface.
Table 7
details the select functions for Byte 0, bits 1 and 0.
Data Byte 1
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
--
--
--
--
40
--
43
44
--
7
--
13
12
11
10
8
--
--
26
25
--
21, 20,
18, 17
--
--
--
--
SDRAM12
--
CPU1
CPU0
--
PCI_F
--
PCI5
PCI4
PCI3
PCI2
PCI1
--
--
48MHz
24MHz
--
SDRAM8:11
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Clock Output Disable
(Reserved)
Clock Output Disable
Clock Output Disable
(Reserved)
Clock Output Disable
(Reserved)
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
(Reserved)
(Reserved)
Clock Output Disable
Clock Output Disable
(Reserved)
Clock Output Disable
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
1
0
0
1
1
0
1
Data Byte 2
Data Byte 3
Rev 1.0, November 21, 2006
Page 6 of 15
SPECTRALINEAR [ SPECTRALINEAR INC ]
