W312-02
Table 5. Additional Frequency Selections through Serial Data Interface Data Bytes
Input Conditions
Output Frequency
PLL Gear
Constants
(G)
FS4
SEL4
0
FS3
SEL3
0
FS2
SEL2
0
FS1
FS0
SEL0
0
SEL1
0
CPU
156.0
154.0
152.0
147.0
144.0
142.0
138.0
136.0
124.0
122.0
117.0
115.0
113.0
108.0
105.0
102.0
Reserved
Reserved
Reserved
200.0
190.0
180.0
170.0
150.0
140.0
120.0
110.0
66.6
3V66
78.0
PCI
39.0
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
Reserved
Reserved
Reserved
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
48.00741
0
0
0
0
1
77.0
38.5
0
0
0
1
0
76.0
38.0
0
0
0
1
1
73.5
36.8
0
0
1
0
0
72.0
36.0
0
0
1
0
1
71.0
35.5
0
0
1
1
0
69.0
34.5
0
0
1
1
1
68.0
34.0
0
1
0
0
0
62.0
31.0
0
1
0
0
1
61.0
30.5
0
1
0
1
0
78.0
39.0
0
1
0
1
1
76.7
38.3
0
1
1
0
0
75.3
37.7
0
1
1
0
1
72.0
36.0
0
1
1
1
0
70.0
35.0
0
1
1
1
1
68.0
34.0
1
0
0
0
0
Reserved
Reserved
Reserved
66.6
Reserved
Reserved
Reserved
33.3
1
0
0
0
1
1
0
0
1
0
1
0
0
1
1
1
0
1
0
0
76.0
38.0
1
0
1
0
1
72.0
36.0
1
0
1
1
0
68.0
34.0
1
0
1
1
1
75.0
37.5
1
1
0
0
0
70.0
35.0
1
1
0
0
1
60.0
30.0
1
1
0
1
0
73.3
33.3
1
1
0
1
1
66.6
33.3
1
1
1
0
0
200.0
166.6
100.0
133.3
66.6
33.3
1
1
1
0
1
66.6
33.3
1
1
1
1
0
66.6
33.3
1
1
1
1
1
66.6
33.3
Programmable Output Frequency, Watchdog Timer and
Recovery Output Frequency Functional Description
The Watchdog Timer and Recovery Output Frequency
features allow users to implement a recovery mechanism
when the system hangs or getting unstable. System BIOS or
other control software can enable the Watchdog timer before
they attempt to make a frequency change. If the system hangs
and a Watchdog timer time-out occurs, a system reset will be
generated and a recovery frequency will be activated.
The Programmable Output Frequency feature allows users to
generate any CPU output frequency from the range of 50 MHz
to 248 MHz. Cypress offers the most dynamic and the simplest
programming interface for system developers to utilize this
feature in their platforms.
All of the related registers are summarized inTable 7.
Rev 1.0,November 27, 2006
Page 12 of 19