UPSD3254A, UPSD3254BV
UPSD3253B, UPSD3253BV
Flash Programmable System Devices
with 8032 Microcontroller Core
FEATURES SUMMARY
s
The uPSD325X devices combine a Flash PSD
architecture with an 8032 microcontroller core.
The uPSD325X devices of Flash PSDs feature
dual banks of Flash memory, SRAM, general
purpose I/O and programmable logic, supervi-
sory functions and access via USB, I
2
C, ADC,
DDC and PWM channels, and an on-board
8032 microcontroller core, with two UARTs,
three 16-bit Timer/Counters and two External
Interrupts. As with other Flash PSD families, the
uPSD325X devices are also in-system pro-
grammable (ISP) via a JTAG ISP interface.
s
Large 32KByte SRAM with battery back-up
option
s
Figure 1. 52-lead, Thin, Quad, Flat Package
TQFP52 (T)
Dual bank Flash memories
– 128KByte or 256KByte main Flash memory
– 32KByte secondary Flash memory
s
Content Security
– Block access to Flash memory
Programmable Decode PLD for flexible address
mapping of all memories within 8032 space.
High-speed clock standard 8032 core (12-cycle)
USB Interface (some devices only)
I
2
C interface for peripheral connections
5 Pulse Width Modulator (PWM) channels
Analog-to-Digital Converter (ADC)
Standalone Display Data Channel (DDC)
Six I/O ports with up to 46 I/O pins
3000 gate PLD with 16 macrocells
Supervisor functions with Watchdog Timer
In-System Programming (ISP) via JTAG
Zero-Power Technology
Single Supply Voltage
– 4.5 to 5.5V
– 3.0 to 3.6V
Figure 2. 80-lead, Thin, Quad, Flat Package
s
s
s
s
s
s
s
s
s
s
s
s
s
TQFP80 (U)
September 2003
Rev. 1.2
1/175
STMICROELECTRONICS [ STMICROELECTRONICS ]
