M25PXX
Figure 3. SO8 and VDFPN Connections
SUMMARY DESCRIPTION
The M25Pxx is a 512Kbit to 32Mbit (2M x 8) Serial
Flash Memory, with advanced write protection
mechanisms, accessed by a high speed SPI-com-
patible bus.
The memory can be programmed 1 to 256 bytes at
a time, using the Page Program instruction.
The memory is organized as a number of sectors,
each containing 256 or 128 pages. Each page is
256 bytes wide.
The whole memory can be erased using the Bulk
Erase instruction, or a sector at a time, using the
Sector Erase instruction.
M25Pxx
S
Q
1
2
3
4
8
V
CC
HOLD
7
6
W
C
D
V
5
SS
AI10259
Figure 2. Logic Diagram
V
CC
D
C
S
Q
Note: 1. There is an exposed die paddle on the underside of the
MLP8 package. This is pulled, internally, to V , and
SS
must not be allowed to be connected to any other voltage
or signal line on the PCB.
M25Pxx
Figure 4. SO16 Connections
W
M25Pxx
HOLD
HOLD
1
2
3
4
5
6
7
8
16
15
C
V
D
CC
DU
14
DU
DU
DU
DU
V
SS
AI10258
DU
DU
DU
S
13
12
11
10
V
SS
W
Table 2. Signal Names
Q
9
C
Serial Clock
Serial Data Input
Serial Data Output
Chip Select
Write Protect
Hold
AI10260
D
Note: 1. DU = Don’t Use
Q
S
W
HOLD
V
Supply Voltage
Ground
CC
V
SS
2/7
STMICROELECTRONICS [ ST ]
