M48Z35
M48Z35Y
256Kbit (32Kbit x 8) ZEROPOWER
®
SRAM
Features
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Integrated, ultra low power SRAM, power-fail
control circuit, and battery
READ cycle time equals WRITE cycle time
Automatic power-fail chip deselect and WRITE
protection
WRITE protect voltages:
(V
PFD
= Power-fail Deselect Voltage)
– M48Z35: V
CC
= 4.75 to 5.5V
4.5V
≤
V
PFD
≤
4.75V
– M48Z35Y: 4.5 to 5.5V
4.2v
≤
V
pfd
≤
4.5v
Self-contained battery in the CAPHAT™ DIP
package
Packaging includes a 28-lead SOIC and
SNAPHAT
®
top (to be ordered separately)
Pin and function compatible with JEDEC
standard 32K x 8 SRAMs
SOIC package provides direct connection for a
SNAPHAT top which contains the battery
RoHS compliant
–
Lead-free second level interconnect
28
1
PCDIP28 (PC)
Battery CAPHAT
SNAPHAT (SH)
Battery
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28
1
SOH28 (MH)
November 2007
Rev 7
1/23
www.st.com
1
STMICROELECTRONICS [ STMICROELECTRONICS ]
