STM8S105xx
Pinout and pin description
Figure 6: SDIP 32-pin pinout
ADC_ETR/TIM2_CH2/PD3(HS)
[BEEP]TIM2_CH1/PD4(HS)
1
2
3
4
5
6
7
8
9
32
PD2(HS)/TIM3_CH1[TIM2_CH3]
31 PD1(HS)/SWIM
30
UART2_TX/PD5
UART2_RX/PD6
PD0(HS)/TIM3_CH2[TIM1_BKIN][CLK_CCO]
29 PC7(HS)/SPI_MISO
(TIM1_CH4)TLI/PD7
28
PC6(HS)/SPI_MOSI
NRST
27 PC5(HS)/SPI_SCK
OSCIN/PA1
26
PC4(HS)/TIM1_CH4
OSCOUT/PA2
25 PC3(HS)/TIM1_CH3
V
24
PC2(HS)/TIM1_CH2
SS
VCAP 10
23 PC1(HS)/TIM1_CH1/UART2_CK
V
11
12
13
14
15
22
PE5/SPI_NSS
DD
DDIO
V
21 PB0/AIN0[TIM1_CH1N]
AIN12/PF4
20
PB1/AIN1[TIM1_CH2N]
V
19 PB2/AIN2[TIM1_CH3N]
DDA
V
18
PB3/AIN3[TIM1_ETR]
SSA
[I2C_SDA]AIN5/PB5 16
17 PB4/AIN4[I2C_SCL]
105_ai15057
1. (HS) high sink capability.
2. (T) True open drain (P-buffer and protection diode to VDD not implemented).
3. [ ] alternate function remapping option (If the same alternate function is shown twice, it
indicates an exclusive choice not a duplication of the function).
Table 6: Pin description for STM8S105 microcontrollers
Pin number
Pin
name
Type Input
Output
Main function Default alternate
Alternate
function after
remap
(after reset)
function
LQFP48 LQFP44 LQFP32/ SDIP32
floating wpu Ext.
High Speed OD
interrupt sink
PP
[option bit]
VFQFPN32/
UFQFPN32
1
2
1
2
1
2
6
7
NRST
I/O
I/O
X
Reset
PA1/
OSC
IN
X
X
X
O1
O1
X
X
X
X
Port A1
Resonator/
crystal in
3
3
3
8
PA2/
OSC
OUT
I/O
X
X
Port A2
Resonator/
crystal out
4
5
6
7
8
4
5
6
7
8
-
-
V
S
S
S
S
S
I/O ground
SSIO_1
4
5
6
7
9
V
Digital ground
SS
10
11
12
VCAP
1.8 V regulator capacitor
Digital power supply
I/O power supply
V
DD
V
DDIO_1
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STMICROELECTRONICS [ ST ]
