TSL2571
LIGHT-TO-DIGITAL CONVERTER
TAOS117A − FEBRUARY 2011
Register Set
The device is controlled and monitored by data registers and a command register accessed through the serial
interface. These registers provide for a variety of control functions and can be read to determine results of the
ADC conversions. The register set is summarized in Table 1.
Table 1. Register Address
ADDRESS
−−
RESISTER NAME
COMMAND
ENABLE
ATIME
R/W
W
REGISTER FUNCTION
Specifies register address
RESET VALUE
0x00
0x00
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
ID
0x00
0x01
0x03
0x04
0x05
0x06
0x07
0x0C
0x0D
0x0F
0x12
0x13
0x14
0x15
0x16
0x17
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Enables states and interrupts
ALS ADC time
WTIME
Wait time
AILTL
ALS interrupt low threshold low byte
ALS interrupt low threshold high byte
ALS interrupt high threshold low byte
ALS interrupt high threshold high byte
Interrupt persistence filters
Configuration
AILTH
AIHTL
AIHTH
PERS
CONFIG
CONTROL
ID
Control register
Device ID
STATUS
C0DATA
C0DATAH
C1DATA
C1DATAH
R
Device status
0x00
0x00
0x00
0x00
0x00
R
CH0 ADC low data register
CH0 ADC high data register
CH1 ADC low data register
CH1 ADC high data register
R
R
R
2
The mechanics of accessing a specific register depends on the specific protocol used. See the section on I C
protocols on the previous pages. In general, the COMMAND register is written first to specify the specific
control/status register for following read/write operations.
Copyright E 2011, TAOS Inc.
The LUMENOLOGY r Company
r
r
12
www.taosinc.com
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
