80C154/83C154
Figure 2. Pin Configuration
P1.1/T2EX
P0.0/A0
P0.1/A1
P0.2/A2
P0.3/A3
P1.0/T2
P1.5
P1.6
VCC
P1.4
P1.3
P1.2
NC
P0.4/A4
P0.5/A5
P0.6/A6
P0.7/A7
EA
80C154/83C154
P1.7
RST
RxD/P3.0
NC
TxD/P3.1
INT0/P3.2
INT1/P3.3
T0/P3.4
T1/P3.5
80C154/83C154
NC
ALE
PSEN
P2.7/A14
P2.6/A13
P2.5/A12
P
11
/T2EX
DIL
P
14
P
13
P
12
LCC
P
10
/T2
A1/P
01
A2/P
02
A3/P
03
A0/P
0
NC
V
CC
P
15
P
16
P
17
RST
RxD/P
30
NC
TxD/P
31
INT0/P
32
INT1/P
33
T0/P
34
T1/P
35
P
04
/A4
P
05
/A5
P
06
/A6
P
07
/A7
EA
80C154/83C154
NC
ALE
PSEN
P
27
/A15
P
26
/A14
P
25
/A13
WR/P
36
RD/P
37
P
23
/A11
P
20
/A8
P
21
/A9
P
22
/A10
Flat Pack
Diagrams are for reference only. Package sizes are not to scale
P
24
/A12
XTAL2
XTAL1
V
SS
NC
A10/P2.3
A11/P2.4
A7/P2.0
A8/P2.1
WR/P3.6
RD/P3.7
A9/P2.2
XTAL2
XTAL1
VSS
NC
MATRA MHS
Rev.F (14 Jan. 97)
3
TEMIC [ TEMIC SEMICONDUCTORS ]
