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ADS8284IBRGCT 参数 Datasheet PDF下载

ADS8284IBRGCT图片预览
型号: ADS8284IBRGCT
PDF下载: 下载PDF文件 查看货源
内容描述: 18位, 1 MSPS ,具有片上ADC驱动器( OPA )和4通道差分多路复用伪差分双极性SAR ADC [18-BIT, 1-MSPS, PSEUDO-BIPOLAR DIFFERENTIAL SAR ADC WITH ON-CHIP ADC DRIVER (OPA) AND 4-CHANNEL DIFFERENTIAL MULTIPLEXER]
分类和应用: 驱动器转换器模数转换器
文件页数/大小: 38 页 / 1827 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SLAS628 – MARCH 2009
PIN ASSIGNMENTS
QFN PACKAGE
(TOP VIEW)
CH0P
CH0M
CH1P
CH1M
PD-RBUF
VEE
VCC
VCC
INP
AGND
INM
NC
CH2P
CH2M
CH3P
CH3M
16 15 14 13 12 11 10 9 8
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
NC
BUF-REF
VCMO
+VA
AGND
REFOUT
REFIN
REFM
REFM
+VA
AGND
+VA
CS
RD
CONVST
BYTE
7 6
5 4 3
2
1
64
63
62
61
60
59
58
ADS8284
57
56
55
54
53
52
51
50
49
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
BUS18_16
+VBD
BUSY
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
BGND
+VBD
DB10
PIN
NO
NAME
I/O
MULTIPLEXER INPUT PINS
17
18
19
20
29
30
31
32
CH0P
CH0M
CH1P
CH1M
CH2P
CH2M
CH3P
CH3M
I
I
I
I
I
I
I
I
Non-inverting analog input for differential multiplexer channel number 0. Device performance is optimized for 50-Ω source
impedance at this input.
Inverting analog input for differential multiplexer channel number 0. Device performance is optimized for 50-Ω source
impedance at this input.
Non-inverting analog input for differential multiplexer channel number 1. Device performance is optimized for 50-Ω source
impedance at this input.
Inverting analog input for differential multiplexer channel number 1. Device performance is optimized for 50-Ω source
impedance at this input.
Non-inverting analog input for differential multiplexer channel number 2. Device performance is optimized for 50-Ω source
impedance at this input.
Inverting analog input for differential multiplexer channel number 2. Device performance is optimized for 50-Ω source
impedance at this input.
Non-inverting analog input for differential multiplexer channel number 3. Device performance is optimized for 50 ohm source
impedance at this input.
Inverting analog input for differential multiplexer channel number 3. Device performance is optimized for 50-Ω source
impedance at this input.
ADC INPUT PINS
25
27
INP
INM
I
I
ADC Non inverting input., connect 1-nF capacitor across INP and INM
ADC Inverting input, connect 1-nF capacitor across INP and INM
REFERENCE INPUT/ OUTPUT PINS
8, 9
10
11
REFM
REFIN
REFOUT
I
I
O
Reference ground.
Reference Input. Add 0.1-µF decoupling capacitor between REFIN and REFM.
Reference Output. Add 1-µF capacitor between the REFOUT pin and REFM pin when internal reference is used.
AUTO
C3
C2
C1
MXCLK
+VA
AGND
+VA
AGND
DB17
DB16
DB15
DB14
DB13
DB12
DB11
PIN FUNCTIONS
DESCRIPTION
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :ADS8284
9