bq24010, bq24012, bq24013, bq24014
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
ELECTRICAL CHARACTERISTICS
over 0_C
≤
TJ
≤
125_C and recommended supply voltage, unless otherwise noted
PARAMETER
INPUT CURRENT
VCC current, ICC(VCC)
Sleep current, ICC(SLP)
Input bias current on BAT pin, IIB(BAT)
Input current on TS pin, IIB(TS)
Input current on CE pin, IIB(CE)
Input bias current on TTE pin, IIB(TTE)
VOLTAGE REGULATION
VO(REG) + V(DO−MAX)
≤
VCC , I(TERM) < IO(OUT)
≤
1 A
Output voltage, VO(REG)
Voltage regulation accuracy
Dropout voltage (V(IN) − V(OUT)), V(DO)
CURRENT REGULATION
Output current range, IO(OUT) (1)
Output current set voltage, V(SET)
VCC
≥
4.5 V, VIN
≥
4.5 V, VI(BAT) > V(LOWV),
VIN − VI(BAT) > V(DO−MAX)
Voltage on ISET pin, VCC
≥
4.5 V, VIN
≥
4.5 V,
VI(BAT) > V(LOWV), VIN − VI(BAT) > V(DO−MAX)
VO(REG) = 4.2 V
50 mA
≤
IO(OUT)
≤
1000 mA, VI(ISET)
≥
V(TAPER)
10 mA
≤
IO(OUT) < 50 mA,
10 mA
≤
IO(OUT) < 50 mA,
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-charge transition
threshold, V(LOWV)
Precharge to short-circuit transition
threshold, V(SC)
Precharge range, IO(PRECHG)(2)
Precharge set voltage, V(PRECHG)
Short circuit current, ISC
Voltage on BAT pin
Voltage on BAT pin
V(SC) < VI(BAT) < V(LOWV), t < t(PRECHG)
Voltage on ISET pin,
V(SC) < VI(BAT) < V(LOWV)
V(SC) > VI(BAT)
2.80
1.0
10
225
660
10
225
5.0
250
17.5
250
900
2.95
1.4
3.10
V
1.8
100
280
1200
100
275
mV
50.0
mV
µA
mA
VI(ISET)
≥
V(TAPER)
VI(ISET) < V(TAPER)
100
1000
mA
TA = 25_C
VO(REG) + V(DO−MAX))
≤
VCC, IO(OUT) = 1A
−0.5%
−1%
650
4.20
0.5%
1%
790
mV
V
VI(TS)
≤
10 V
VCC > VCC(min), STATx pins in OFF state
Sum of currents into OUT and BAT pins,
VCC < V(SLP)
0
3.5
5
5
500
1
1
1
µA
mA
µA
nA
TEST CONDITIONS
MIN
TYP
MAX
UNIT
2.45
315
315
350
2.50
335
372
2.55
355
430
1000
V
Output current set factor, K(SET)
CHARGE TAPER AND TERMINATION DETECTION
Charge taper detection range, I(TAPER)(3) VI(BAT) > V(RCH), t < t(TAPER)
Charge taper detection set voltage,
V(TAPER)
Charge termination detection set voltage,
V(TERM)
TEMPERATURE COMPARATOR
Lower threshold, V(TS1)
Upper threshold, V(TS2)
Hysteresis
(1)
I
O(OUT)
+
(2)
I
O(PRECHG)
+
(3)
I
O(TAPER)
+
K
(SET)
V
(SET)
Voltage on ISET pin,
t < t(TAPER),
VI(BAT) > V(RCH),
VI(BAT) = VO(REG)
Voltage on ISET pin,
VI(BAT) = VO(REG),
VI(BAT) >V(RCH),I(TERM) =K
(SET)
×
V
(TERM) /R(SET)
Voltage on TS pin
Voltage on TS pin
29
60
30
61
1
31
62
%VCC
R
SET
K
(SET)
V
(PRECHG)
R
SET
V
(TAPER)
R
SET
K
(SET)
3
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