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CD74HCT20MT 参数 Datasheet PDF下载

CD74HCT20MT图片预览
型号: CD74HCT20MT
PDF下载: 下载PDF文件 查看货源
内容描述: 高速CMOS逻辑双路4输入与非门 [High-Speed CMOS Logic Dual 4-Input NAND Gate]
分类和应用:
文件页数/大小: 9 页 / 257 K
品牌: TI [ TEXAS INSTRUMENTS ]
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CD54HC20, CD74HC20,
CD54HCT20, CD74HCT20
Data sheet acquired from Harris Semiconductor
SCHS130C
August 1997 - Revised September 2003
High-Speed CMOS Logic
Dual 4-Input NAND Gate
Description
The ’HC20 and ’HCT20 logic gates utilize silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The HCT logic family is functionally pin
compatible with the standard LS logic family.
Features
• Buffered Inputs
[ /Title
(CD74H
C20,
CD74H
CT20)
/Subject
(High
Speed
CMOS
Logic
Dual 4-
Input
• Typical Propagation Delay: 8ns at V
CC
= 5V,
C
L
= 15pF, T
A
= 25
o
C
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
1µA at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC20F3A
CD54HCT20F3A
CD74HC20E
CD74HC20M
CD74HC20MT
CD74HC20M96
CD74HCT20E
CD74HCT20M
CD74HCT20MT
CD74HCT20M96
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
14 Ld CERDIP
14 Ld CERDIP
14 Ld PDIP
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
14 Ld PDIP
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
Pinout
CD54HC20, CD54HCT20
(CERDIP)
CD74HC20, CD74HCT20
(PDIP, SOIC)
TOP VIEW
1A 1
1B 2
NC 3
1C 4
1D 5
1Y 6
GND 7
14 V
CC
13 2D
12 2C
11 NC
10 2B
9 2A
8 2Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
2003, Texas Instruments Incorporated
1