CDC2582
3.3-V PHASE-LOCK LOOP CLOCK DRIVER
WITH DIFFERENTIAL LVPECL CLOCK INPUTS
SCAS379B – FEBRUARY 1993 – REVISED FEBRUARY 1996
D
D
D
D
D
D
Low Output Skew for Clock-Distribution
and Clock-Generation Applications
Operates at 3.3-V V
CC
Distributes Differential LVPECL Clock
Inputs to 12 TTL-Compatible Outputs
Two Select Inputs Configure Up to Nine
Outputs to Operate at One-Half or Double
the Input Frequency
No External RC Network Required
External Feedback Input (FBIN) Is Used to
Synchronize the Outputs With the Clock
Inputs
D
D
D
D
D
Application for Synchronous DRAMs
Outputs Have Internal 26-Ω Series
Resistors to Dampen Transmission-Line
Effects
State-of-the-Art
EPIC-
ΙΙ
B
™
BiCMOS Design
Significantly Reduces Power Dissipation
Distributed V
CC
and Ground Pins Reduce
Switching Noise
Packaged in 52-Pin Quad Flatpack
PAH PACKAGE
(TOP VIEW)
GND
1Y1
V
CC
GND
1Y2
V
CC
GND
1Y3
V
CC
GND
GND
2Y1
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
52 51 50 49 48 47 46 45 44 43 42 41 40
39
38
37
36
35
34
33
32
31
30
29
28
27
14 15 16 17 18 19 20 21 22 23 24 25 26
GND
SEL1
SEL0
AGND
FBIN
AGND
AV
CC
CLKIN
CLKIN
AV
CC
OE
TEST
CLR
V
CC
4Y3
GND
V
CC
4Y2
GND
V
CC
4Y1
GND
GND
V
CC
3Y3
GND
description
The CDC2582 is a high-performance, low-skew, low-jitter clock driver. It uses a phase-lock loop (PLL) to
precisely align the frequency and phase of the clock output signals to the differential LVPECL clock (CLKIN,
CLKIN) input signals. It is specifically designed to operate at speeds from 50 MHz to 100 MHz or down to 25 MHz
on outputs configured as half-frequency outputs. Each output has an internal 26-Ω series resistor that improves
the signal integrity at the load. The CDC2582 operates at 3.3-V V
CC
.
The feedback input (FBIN) synchronizes the frequency of the output clocks with the input clock (CLKIN, CLKIN)
signals. One of the twelve output clocks must be fed back to FBIN for the PLL to maintain synchronization
between the differential CLKIN and CLKIN inputs and the outputs. The output used as feedback is synchronized
to the same frequency as the clock (CLKIN and CLKIN) inputs.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
GND
2Y2
V
CC
GND
2Y3
V
CC
GND
GND
3Y1
V
CC
GND
3Y2
V
CC
Copyright
©
1996, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
TI [ TEXAS INSTRUMENTS ]
