CDC341
1-LINE TO 8-LINE CLOCK DRIVER
SCAS333D – DECEMBER 1992 – REVISED OCTOBER 1998
D
D
D
D
D
D
D
Low Output Skew, Low Pulse Skew for
Clock-Distribution and Clock-Generation
Applications
TTL-Compatible Inputs and Outputs
Distributes One Clock Input to Eight
Outputs
Distributed V
CC
and Ground Pins Reduce
Switching Noise
High-Drive Outputs (– 48-mA I
OH
,
48-mA I
OL
)
State-of-the-Art
EPIC-
ΙΙ
B
™
BiCMOS Design
Significantly Reduces Power Dissipation
Packaging Options Include Plastic
Small-Outline (DW) Packages
DW PACKAGE
(TOP VIEW)
V
CC
1G
2G
A
P0
P1
V
CC
2Y4
2Y3
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
1Y1
1Y2
GND
1Y3
1Y4
GND
2Y1
2Y2
GND
description
The CDC341 is a high-performance clock-driver circuit that distributes one (A) input signal to eight (Y) outputs
with minimum skew for clock distribution. Through the use of the control pins (1G and 2G), the outputs can be
placed in a low state regardless of the A input.
The propagation delays are adjusted at the factory using the P0 and P1 pins. These pins are not intended for
customer use and should be strapped to GND.
The CDC341 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
1G
X
L
L
H
H
2G
X
L
H
L
H
A
L
H
H
H
H
OUTPUTS
1Y1 – 1Y4
L
L
L
H
H
2Y1 – 2Y4
L
L
H
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙΒ is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1998, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
TI [ TEXAS INSTRUMENTS ]
