PIN CONFIGURATION
Top View
SO, TSSOP
PIN DESCRIPTIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DESIGNATOR
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
PD
DESCRIPTION
Data Bit 1 (D13), MSB
Data Bit 2 (D12)
Data Bit 3 (D11)
Data Bit 4 (D10)
Data Bit 5 (D9)
Data Bit 6 (D8)
Data Bit 7 (D7)
Data Bit 8 (D6)
Data Bit 9 (D5)
Data Bit 10 (D4)
Data Bit 11 (D3)
Data Bit 12 (D2)
Data Bit 13 (D1)
Data Bit 14 (D0), LSB
Power Down, Control Input; Active
HIGH. Contains internal pull-down circuit;
may be left unconnected if not used.
Reference Select Pin; Internal ( = 0) or
External ( = 1) Reference Operation
Reference Input/Ouput. See Applications
section for further details.
Full-Scale Output Adjust
Bandwidth/Noise Reduction Pin:
Bypass with 0.1µF to +V
A
for Optimum
Performance. (Optional)
Analog Ground
Complementary DAC Current Output
DAC Current Output
Bypass Node: Use 0.1µF to AGND
Analog Supply Voltage, 2.7V to 5.5V
No Internal Connection
Digital Ground
Digital Supply Voltage, 2.7V to 5.5V
Clock Input
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
1
2
3
4
5
6
7
DAC904
8
9
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CLK
+V
D
DGND
NC
+V
A
BYP
I
OUT
I
OUT
AGND
16
17
INT/EXT
REF
IN
FSA
BW
Bit 10 10
Bit 11 11
Bit 12 12
Bit 13 13
Bit 14 14
BW
FSA
REF
IN
INT/EXT
PD
18
19
20
21
22
23
24
25
26
27
28
AGND
I
OUT
I
OUT
BYP
+V
A
NC
DGND
+V
D
CLK
TYPICAL CONNECTION CIRCUIT
+5V
0.1µF
(1)
+V
A
DAC904
FSA
REF
IN
R
SET
0.1µF
Current
Sources
LSB
Switches
Segmented
MSB
Switches
BW
+V
D
I
OUT
I
OUT
BYP
0.1µF
50Ω
20pF
(1)
50Ω
20pF
(1)
1:1
+5V
V
OUT
INT/EXT
PD
Latches
+1.24V Ref.
14-Bit Data Input
AGND
CLK
D13.......D0
DGND
NOTE: (1) Optional components.
4
DAC904
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SBAS095C
TI [ TEXAS INSTRUMENTS ]
