www.ti.com
SLLS755K – JULY 2006 – REVISED JANUARY 2010
DUAL DIGITAL ISOLATORS
Check for Samples:
1
FEATURES
•
1, 5, 25, and 150-Mbps Signaling Rate Options
– Low Channel-to-Channel Output Skew;
1 ns max
– Low Pulse-Width Distortion (PWD);
1 ns max
– Low Jitter Content; 1 ns Typ at 150 Mbps
Typical 25-Year Life at Rated Voltage
(see app. note
and
4000-V
peak
Isolation, 560 V
peak
V
IORM
– UL 1577, IEC 60747-5-2 (VDE 0884, Rev 2),
IEC 61010-1, IEC 60950-1 and CSA
Approved
– 50 kV/ms Typical Transient Immunity
•
•
•
•
Operates with 3.3-V or 5-V Supplies
4 kV ESD Protection
High Electromagnetic Immunity
–40°C to 125°C Operating Range
2
APPLICATIONS
•
Industrial Fieldbus
– Modbus
– Profibus™
– DeviceNet™ Data Buses
Computer Peripheral Interface
Servo Control Interface
Data Acquisition
•
•
•
•
•
DESCRIPTION
The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are oriented
in the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic input
and output buffer separated by TI’s silicon-dioxide (SiO
2
) isolation barrier, providing galvanic isolation of up to
4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, and
prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or
damaging sensitive circuitry.
A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation
barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or
resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure
the proper dc level of the output. If this dc-refresh pulse is not received every 4
ms,
the input is assumed to be
unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.
The small capacitance and resulting time constant provide fast operation with signaling rates available from 0
Mbps (dc) to 150 Mbps.
(1)
The A-, B- and C-option devices have TTL input thresholds and a noise filter at the
input that prevents transient pulses from being passed to the output of the device. The M-option devices have
CMOS V
CC
/2 input thresholds and do not have the input noise-filter and the additional propagation delay.
These devices require two supply voltages of 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when
supplied from a 3.3-V supply and all outputs are 4-mA CMOS.
These devices are characterized for operation over the ambient temperature range of –40°C to 125°C.
ISO7220xD
V
CC1
INA
INB
GND1
(1)
1
ISO7221xD
V
CC2
OUTA
OUTB
GND2
V
CC1
OUTA
INB
GND1
1
2
3
4
Isolation
8
7
6
5
1
Isolation
2
3
4
8
7
6
5
V
CC2
INA
OUTB
GND2
The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
2
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
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