SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004
MAX222
5 V DUAL RS 232 LINE DRIVER/RECEIVER
WITH
±15
kV ESD PROTECTION
APPLICATION INFORMATION
capacitor selection
The capacitor type used for C1−C4 is not critical for proper operation. The MAX222 requires 0.1-µF capacitors,
although capacitors up to 10
µF
can be used without harm. Ceramic dielectrics are suggested for the 0.1-µF
capacitors. When using the minimum recommended capacitor values, ensure that the capacitance value does
not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (e.g., 2×)
nominal value. The capacitors’ effective series resistance (ESR), which usually rises at low temperatures,
influences the amount of ripple on V
+
and V
−
.
Use larger capacitors (up to 10
µF)
to reduce the output impedance at V
+
and V
−
.
Bypass V
CC
to ground with at least 0.1
µF.
In applications sensitive to power-supply noise generated by the
charge pumps, decouple V
CC
to ground with a capacitor the same size as (or larger than) the charge-pump
capacitors (C1−C4).
ESD protection
TI MAX222 devices have standard ESD protection structures incorporated on the pins to protect against
electrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driver
outputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structures
were designed to successfully protect these bus pins against ESD discharge of
±15-kV
when powered down.
ESD test conditions
ESD testing stringently is performed by TI, based on various conditions and procedures. Contact TI for a
reliability report that documents test setup, methodology, and results.
Human-Body Model
The Human-Body Model (HBM) of ESD testing is shown in Figure 5, while Figure 6 shows the current waveform
that is generated during a discharge into a low impedance. The model consists of a 100-pF capacitor, charged
to the ESD voltage of concern, and subsequently discharged into the DUT through a 1.5-kΩ resistor.
RD
1.5 kΩ
VHBM
+
−
CS
100 pF
DUT
Figure 5. HBM ESD Test Circuit
8
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