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PCA9557D 参数 Datasheet PDF下载

PCA9557D图片预览
型号: PCA9557D
PDF下载: 下载PDF文件 查看货源
内容描述: 远程8位I2C和SMBus低功耗I / O扩展器,带有复位和配置寄存器 [REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH RESET AND CONFIGURATION REGISTERS]
分类和应用: 外围集成电路光电二极管
文件页数/大小: 36 页 / 1174 K
品牌: TI [ TEXAS INSTRUMENTS ]
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www.ti.com....................................................................................................................................................
SCPS133I – DECEMBER 2005 – REVISED JUNE 2008
REMOTE 8-BIT I
2
C AND SMBus LOW-POWER I/O EXPANDER
WITH RESET AND CONFIGURATION REGISTERS
1
FEATURES
Low Standby Current Consumption of
1
µA
Max
I
2
C to Parallel Port Expander
Operating Power-Supply Voltage Range of
2.3 V to 5.5 V
5-V Tolerant I/O Ports
400-kHz Fast I
2
C Bus
Three Hardware Address Pins Allow for Use of
up to Eight Devices on I
2
C/SMBus
Lower-Voltage Higher-Performance Migration
Path for PCA9556
Input/Output Configuration Register
Polarity Inversion Register
Active-Low Reset Input
Internal Power-On Reset
High-Impedance Open Drain on P0
Power Up With All Channels Configured as
Inputs
No Glitch on Power Up
Noise Filter on SCL/SDA Inputs
Latched Outputs With High Current Drive
Maximum Capability for Directly Driving LEDs
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
RGY PACKAGE
(TOP VIEW)
RGV PACKAGE
(TOP VIEW)
RESET
SDA
SCL
V
CC
SCL
SDA
A0
A1
A2
P0
P1
2
3
4
5
6
7
1
D, DB, DGV, OR PW PACKAGE
(TOP VIEW)
9
P1
GND
P2
DESCRIPTION/ORDERING INFORMATION
This 8-bit I/O expander for the two-line bidirectional bus (I
2
C) is designed for 2.3-V to 5.5-V V
CC
operation. The
device provides general-purpose remote I/O expansion for most microcontroller families via the I
2
C interface
[serial clock (SCL) and serial data (SDA)].
The PCA9557 consists of one 8-bit configuration (input or output selection), input port, output port, and polarity
inversion (active-high) registers. At power on, the I/Os are configured as inputs. However, the system master can
enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or
output is kept in the corresponding input or output register. The polarity of the input port register can be inverted
with the polarity inversion register. All registers can be read by the system master.
The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low
current consumption.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
P3
Copyright © 2005–2008, Texas Instruments Incorporated
GND
P2
SCL
SDA
A0
A1
A2
P0
P1
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
V
CC
RESET
P7
P6
P5
P4
P3
P2
A0
A1
A2
P0
1
2
3
4
16 15 14 13
12
11
10
9
5
6
7
8
V
CC
16 15
14
13
12
11
9 10
P7
P6
P5
P4
8
RESET
P7
P6
P5
P4
P3