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PCM1602Y 参数 Datasheet PDF下载

PCM1602Y图片预览
型号: PCM1602Y
PDF下载: 下载PDF文件 查看货源
内容描述: 24位192kHz采样, 6通道,增强型多级Δ-Σ数位类比转换器 [24-Bit, 192kHz Sampling, 6-Channel, Enhanced Multilevel, Delta-Sigma DIGITAL-TO-ANALOG CONVERTER]
分类和应用: 转换器数模转换器
文件页数/大小: 31 页 / 452 K
品牌: TI [ TEXAS INSTRUMENTS ]
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PIN ASSIGNMENTS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NAME
ZERO1/GPO1
ZERO2/GPO2
ZERO3/GPO3
ZERO4/GPO4
ZERO5/GPO5
ZERO6/GPO6
NC
NC
V
OUT
6
V
OUT
5
V
OUT
4
V
OUT
3
V
OUT
2
V
OUT
1
V
COM
NC
AGND5
V
CC
5
AGND6
NC
AGND4
V
CC
4
AGND3
V
CC
3
AGND2
V
CC
2
AGND1
V
CC
1
NC
NC
NC
NC
MDO
MDI
MC
ML
RST
SCKI
SCKO
BCK
LRCK
TEST
V
DD
DGND
DATA1
DATA2
DATA3
ZEROA
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
O
I
I
I
I
I
O
DESCRIPTION
Zero Data Flag for V
OUT
1. Can also be used as GPO pin.
Zero Data Flag for V
OUT
2. Can also be used as GPO pin.
Zero Data Flag for V
OUT
3. Can also be used as GPO pin.
Zero Data Flag for V
OUT
4. Can also be used as GPO pin.
Zero Data Flag for V
OUT
5. Can also be used as GPO pin.
Zero Data Flag for V
OUT
6. Can also be used as GPO pin.
No Connection
No Connection
Voltage Output of Audio Signal Corresponding to Rch on DATA3. Up to 96kHz.
Voltage Output of Audio Signal Corresponding to Lch on DATA3. Up to 96kHz.
Voltage Output of Audio Signal Corresponding to Rch on DATA2. Up to 96kHz.
Voltage Output of Audio Signal Corresponding to Lch on DATA2. Up to 96kHz.
Voltage Output of Audio Signal Corresponding to Rch on DATA1. Up to 192kHz.
Voltage Output of Audio Signal Corresponding to Lch on DATA1. Up to 192kHz.
Common Voltage Output. This pin should be bypassed with a 10µF capacitor to AGND.
No Connection
Analog Ground
Analog Power Supply, +5V
Analog Ground
No Connection
Analog Ground
Analog Power Supply, +5V
Analog Ground
Analog Power Supply, +5V
Analog Ground
Analog Power Supply, +5V
Analog Ground
Analog Power Supply, +5V
No Connection
No Connection
No Connection
No Connection
Serial Data Output for Serial Control Port
(3)
Serial Data Input for Serial Control Port
(1)
Shift Clock for Serial Control Port
(1)
Latch Enable for Serial Control Port
(1)
System Reset, Active LOW
(1)
System Clock Input. Input frequency is 128, 192, 256, 384, 512, or 768f
S
.
(2)
Buffered Clock Output. Output frequency is 128, 192, 256, 384, 512, or 768f
S
, or one-half of 128, 192, 256, 384, 512, or 768f
S.
Shift Clock Input for Serial Audio Data. Clock must be 32, 48, or 64f
S
.
(2)
Left and Right Clock Input. This clock is equal to the sampling rate, f
S
.
(2)
Test Pin. This pin should be connected to DGND.
(1)
Digital Power Supply, +3.3V
Digital Ground
Serial Audio Data Input for V
OUT
1 and V
OUT
2
(2)
Serial Audio Data Input for V
OUT
3 and V
OUT
4
(2)
Serial Audio Data Input for V
OUT
5 and V
OUT
6
(2)
Zero Data Flag. Logical “AND” of ZERO1 through ZERO6.
NOTES: (1) Schmitt-Trigger input with internal pull-down, 5V tolerant. (2) Schmitt-Trigger input, 5V tolerant. (3) Tri-state output.
6
PCM1602
SBAS163