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SBOS396B – MARCH 2009 – REVISED JUNE 2009
PIN CONFIGURATION
DB PACKAGE
SSOP-24
(TOP VIEW)
AGND
GPO1
GPO2
GPO3
GPO4
OVR
DGND
SDI
1
2
3
4
5
6
PGA2505
7
8
9
10
11
12
18
17
16
15
14
13
C
S22
VA-
VA+
V
OUT
+
V
OUT
-
VA-
24
23
22
21
20
19
V
IN
+
V
IN
-
V
COM
IN
C
S11
C
S12
C
S21
CS
SCLK
SDO
VD-
PIN ASSIGNMENTS
TERMINAL
NAME
AGND
GPO1
GPO2
GPO3
GPO4
OVR
DGND
SDI
CS
SCLK
SDO
VD–
VA–
V
OUT
–
V
OUT
+
VA+
VA–
C
S22
C
S21
C
S12
C
S11
V
COM
IN
V
IN
–
V
IN
+
PIN#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Analog Ground
General-Purpose CMOS Logic Output
General-Purpose CMOS Logic Output
General-Purpose CMOS Logic Output
General-Purpose CMOS Logic Output
Over Range Output (Active High)
Digital Ground
Serial Data Input
Chip Select Input (Active Low)
Serial Data Clock Input
Serial Data Output
–5V Digital Supply
–5V Analog Supply
Inverting Analog Output
Noninverting Analog Output
+5V Analog Supply
–5V Analog Supply
External DC Servo Capacitor #2, Terminal 2
External DC Servo Capacitor #2, Terminal 1
External DC Servo Capacitor #1, Terminal 2
External DC Servo Capacitor #1, Terminal 1
Common Mode Voltage Input, 0V to +2.5V
Inverting Analog Input
Noninverting Analog Input
DESCRIPTION
Copyright © 2009, Texas Instruments Incorporated
5
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