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SN65220DBVR 参数 Datasheet PDF下载

SN65220DBVR图片预览
型号: SN65220DBVR
PDF下载: 下载PDF文件 查看货源
内容描述: USB端口瞬态抑制器 [USB PORT TRANSIENT SUPPRESSORS]
分类和应用: 瞬态抑制器二极管光电二极管局域网
文件页数/大小: 9 页 / 224 K
品牌: TI [ TEXAS INSTRUMENTS ]
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YZB-4
DBV-6
www.ti.com
PW-8
P-8
SN65220
SN65240
SN75240
SLLS266F − FEBRUARY 1997 − REVISED JULY 2004
USB PORT TRANSIENT SUPPRESSORS
FEATURES
D
Design to Protect Submicron 3-V or 5-V
D
D
D
D
D
Circuits from Noise Transients
Port ESD Protection Capability Exceeds:
− 15-kV Human Body Model
− 2-kV Machine Model
Available in a WCSP Chip-Scale Package
Stand-Off Voltage
. . .
6.0 V Min
Low Current Leakage
. . .
1
µA
Max at 6 V
Low Capacitance
. . .
35 pF Typ
APPLICATIONS
D
USB 1.1 Host, Hub, or Peripheral Ports
SN65220YZB
(Size: 925
mm
x 925
mm
+6
mm)
(TOP VIEW)
A
B
GND
GND
SN65220DBV
(TOP VIEW)†
NC
GND
NC
1
6
A
GND
B
SADI
2
3
5
4
A1
B1
A2
B2
DESCRIPTION
The SN65220 is a single transient voltage suppressor and
the SN65240 and SN75240 are dual transient voltage
suppressors designed to provide electrical noise transient
protection to Universal Serial Bus (USB) 1.1 ports. Note
that the input capacitance of the device makes it
unsuitable for high-speed USB 2.0 applications.
Any cabled I/O can be subjected to electrical noise
transients from various sources. These noise transients
can cause damage to the USB transceiver and/or the USB
ASIC if they are of sufficient magnitude and duration.
USB ports are typically implemented in 3-V or 5-V digital
CMOS with very limited ESD protection. The SN65220,
SN65240, and SN75240 can significantly increase the
port ESD protection level and reduce the risk of damage
to the circuits of the USB port.
The IEC1000-4-2 ESD performance of the SN65220,
SN65240, and SN75240 is measured at the system level.
Therefore, system design impacts the results of these
tests. A high compliance level may be attained with proper
board design and layout.
EQUIVALENT SCHEMATIC DIAGRAM
A or C
NC − No internal connection
When read horizontally, Pin 1 is the bottom left pin.
SN65240P SN65240PW
,
SN75240P SN75240PW
,
(TOP VIEW)
GND
C
GND
D
1
2
3
4
8
7
6
5
A
GND
B
GND
CURRENT vs VOLTAGE
7.5
5
2.5
Current − A
0
−2.5
−5
−7.5
GND
−10
−10
−5
0
5
10
15
Voltage − V
B or D
(One Suppressor Shown)
: All GND terminals should be connected to ground.
NOTE
NOTE A:
Typical current versus voltage curve was derived
using the IEC 1.2/50-µs surge waveform.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright
1997 − 2003, Texas Instruments Incorporated