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SN74ACT08PW 参数 Datasheet PDF下载

SN74ACT08PW图片预览
型号: SN74ACT08PW
PDF下载: 下载PDF文件 查看货源
内容描述: 四路2输入正与门 [QUADRUPLE 2-INPUT POSITIVE-AND GATES]
分类和应用: 输入元件
文件页数/大小: 5 页 / 81 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SN54ACT08, SN74ACT08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
SCAS535A – SEPTEMBER 1995 – REVISED APRIL 1996
D
D
D
Inputs Are TTL-Voltage Compatible
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPS
SN54ACT08 . . . J OR W PACKAGE
SN74ACT08 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
4B
4A
4Y
3B
3A
3Y
description
The ’ACT08 are quadruple 2-input positive-AND
gates. These devices perform the Boolean
functions Y = A

B or Y = A + B in positive logic.
The SN54ACT08 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The SN74ACT08 is characterized for
operation from – 40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A
H
L
X
B
H
X
L
OUTPUT
Y
H
L
L
SN54ACT08 . . . FK PACKAGE
(TOP VIEW)
1Y
NC
2A
NC
2B
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
1B
1A
NC
VCC
4B
4A
NC
4Y
NC
3B
NC – No internal connection
logic symbol
1A
1B
2A
2B
3A
3B
4A
4B
1
2
4
5
9
10
12
13
8
3Y
6
2Y
&
logic diagram, each gate (positive logic)
A
1Y
B
Y
3
11
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1996, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
2Y
GND
NC
3Y
3A
1