SN74ACT7200L, SN74ACT7201LA, SN74ACT7202LA
256
×
9, 512
×
9, 1024
×
9
ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES
SCAS221A – FEBRUARY 1993 – REVISED SEPTEMBER 1995
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
FIGURE
′ACT7200L-15
′ACT7201LA-15
′ACT7202LA-15
MIN
fclock
tc(R)
tc(W)
tc(RS)
tc(RT)
tw(RL)
tw(WL)
tw(RH)
tw(WH)
tw(RT)
tw(RS)
tw(XIL)
tw(XIH)
tsu(D)
tsu(RT)
tsu(RS)
tsu(XI-R)
tsu(XI-W)
th(D)
th(E-R)
th(F-W)
th(RT)
th(RS)
Clock frequency, R or W
Cycle time, read
Cycle time, write
Cycle time, reset
Cycle time, retransmit
Pulse duration, R low
Pulse duration, W low
Pulse duration, R high
Pulse duration, W high
Pulse duration, FL/RT low
Pulse duration, RS low
Pulse duration, XI low
Pulse duration, XI high
Setup time, data before W↑
Setup time, R and W high
before FL/RT↑‡
Setup time, R and W high
before RS↑‡
Setup time, XI low
before R↓
Setup time, XI low
before W↓
Hold time, data after W↑
Hold time, R low after EF↑
Hold time, W low after FF↑
Hold time, R and W high
after FL/RT↑
Hold time, R and W high
after RS↑
1(a)
1(b)
7
4
1(a)
1(b)
1(a)
1(b)
4
7
10
10
1(b), 6
4
7
10
10
1(b), 6
5, 11
6, 12
4
7
25
25
25
25
15
15
10
10
15
15
15
10
11
15
15
10
10
0
15
15
10
10
MAX
40
35
35
35
35
25
25
10
10
25
25
25
10
15
25
25
10
10
0
25
25
10
10
′ACT7200L-25
′ACT7201LA-25
′ACT7202LA-25
MIN
MAX
28.5
45
45
45
45
35
35
10
10
35
35
35
10
18
35
35
10
10
0
35
35
10
10
′ACT7201LA-35
†
′ACT7202LA-35
†
MIN
MAX
22.2
65
65
65
65
50
50
15
15
50
50
50
10
30
50
50
15
15
5
50
50
15
15
′ACT7200L-50
′ACT7201LA-50
′ACT7202LA-50
MIN
MAX
15
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT
† Released in RJ package only
‡ These values are characterized but not currently tested.
8
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265