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SN74AHCT132DG4 参数 Datasheet PDF下载

SN74AHCT132DG4图片预览
型号: SN74AHCT132DG4
PDF下载: 下载PDF文件 查看货源
内容描述: 翻两番正与非门施密特触发器输入 [QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS]
分类和应用: 栅极触发器逻辑集成电路光电二极管输入元件
文件页数/大小: 10 页 / 296 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SN54AHCT132, SN74AHCT132
QUADRUPLE POSITIVE-NAND GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS366G – MAY 1997 – REVISED APRIL 2002
D
D
D
D
D
D
D
description
The ’AHCT132 devices
positive-NAND gates.
are
quadruple
1Y
NC
2A
NC
2B
4
5
6
7
8
1B
1A
NC
V
CC
4B
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
Inputs Are TTL-Voltage Compatible
Operation From Very Slow Input
Transitions
Temperature-Compensated Threshold
Levels
High Noise Immunity
Same Pinouts as ’AHCT00
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54AHCT132 . . . J OR W PACKAGE
SN74AHCT132 . . . D, DB, DGV, N, NS, OR PW PACKAGE
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
4B
4A
4Y
3B
3A
3Y
SN54AHCT132 . . . FK PACKAGE
(TOP VIEW)
These devices perform the Boolean function
Y = A
B or Y = A + B in positive logic.
Each circuit functions as a NAND gate, but
because of the Schmitt action, it has different input
threshold levels for positive- and negative-going
signals.
These circuits are temperature compensated and
can be triggered from the slowest of input ramps
and still give clean jitter-free output signals.
ORDERING INFORMATION
TA
PDIP – N
SOIC – D
–40°C to 85°C
SOP – NS
SSOP – DB
TSSOP – PW
TVSOP – DGV
CDIP – J
–55°C to 125°C
CFP – W
LCCC – FK
PACKAGE†
Tube
Tube
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tube
Tube
Tube
4A
NC
4Y
NC
3B
NC – No internal connection
ORDERABLE
PART NUMBER
SN74AHCT132N
SN74AHCT132D
SN74AHCT132DR
SN74AHCT132NSR
SN74AHCT132DBR
SN74AHCT132PWR
SN74AHCT132DGVR
SNJ54AHCT132J
SNJ54AHCT132W
SNJ54AHCT132FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
2002, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
2Y
GND
NC
3Y
3A
TOP-SIDE
MARKING
SN74AHCT132N
AHCT132
AHCT132
HB132
HB132
HB132
SNJ54AHCT132J
SNJ54AHCT132W
SNJ54AHCT132FK
1