SN74AHCT32-Q1
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCLS528A − AUGUST 2003 − REVISED APRIL 2008
PARAMETER MEASUREMENT INFORMATION
V
CC
From Output
Under Test
C
L
(see Note A)
Test
Point
From Output
Under Test
C
L
(see Note A)
R
L
= 1 kΩ
S1
Open
GND
TEST
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open Drain
S1
Open
V
CC
GND
V
CC
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
3V
Timing Input
1.5 V
0V
3V
t
su
Data Input
0V
1.5 V
t
h
3V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
3V
1.5 V
t
PZL
50% V
CC
t
PZH
V
OH
50% V
CC
50% V
CC
V
OL
Output
Waveform 2
S1 at GND
(see Note B)
50% V
CC
1.5 V
0V
t
PLZ
≈V
CC
V
OL
+ 0.3 V
t
PHZ
V
OH
− 0.3 V
V
OH
≈0
V
V
OL
t
w
Input
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
Input
t
PLH
In-Phase
Output
t
PHL
Out-of-Phase
Output
1.5 V
1.5 V
0V
t
PHL
V
OH
50% V
CC
50% V
CC
V
OL
t
PLH
Output
Control
Output
Waveform 1
S1 at V
CC
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
1 MHz, Z
O
= 50
Ω,
t
r
≤
3 ns, t
f
≤
3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265