SN54ALS580B, SN74ALS580B, SN74AS580
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS277 – JANUARY 1995
•
•
•
•
3-State Buffer-Type Outputs Drive Bus
Lines Directly
Bus-Structured Pinout
Inverting-Logic Outputs
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N) and
Ceramic (J) 300-mil DIPs, and Ceramic Flat
(W) Packages
SN54ALS580B . . . J OR W PACKAGE
SN74ALS580B, SN74AS580 . . . DW OR N PACKAGE
(TOP VIEW)
description
These octal D-type transparent latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, outputs
(Q) respond to the data (D) inputs. When LE is low,
the outputs are latched to retain the data that was
set up.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither load
nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
interface or pullup components.
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
SN54ALS580B . . . FK PACKAGE
(TOP VIEW)
OE
V
CC
3D
4D
5D
6D
7D
3
4
5
6
7
8
2 1 20 19
18
17
16
15
1Q
2Q
3Q
4Q
5Q
6Q
OE does not affect internal operations of the latches. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
The SN54ALS580B is characterized for operation over the full military temperature range of – 55°C to 125°C.
The SN74ALS580B and SN74AS580 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
INPUTS
OE
L
L
L
H
LE
H
H
L
X
D
H
L
X
X
OUTPUT
Q
L
H
Q0
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1995, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
8D
GND
LE
8Q
7Q
2D
1D
14
9 10 11 12 13
1
TI [ TEXAS INSTRUMENTS ]
