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SINGLE 2-INPUT EXCLUSIVE-OR GATE
SCES389J – MARCH 2002 – REVISED NOVEMBER 2007
1
FEATURES
•
•
•
•
Low Power Consumption, 10-µA Max I
CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
YZP PACKAGE
(BOTTOM VIEW)
•
Available in the Texas Instruments NanoFree™
Package
•
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
•
I
off
Supports Partial Power-Down-Mode
Operation
•
Sub-1-V Operable
•
Max t
pd
of 2.5 ns at 1.8 V
2
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
A
B
GND
1
5
V
CC
A
B
1
2
3
5
V
CC
GND
B
A
3 4
2
1 5
Y
V
CC
2
GND
4
4
Y
3
Y
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single 2-input exclusive-OR gate is operational at 0.8-V to 2.7-V V
CC
, but is designed specifically for 1.65-V
to 1.95-V V
CC
operation.
The SN74AUC1G86 performs the Boolean function Y = A
⊕
B or Y = AB + AB in positive logic.
A common application is as a true/complement element. If the input is low, the other input is reproduced in true
form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
NanoFree™
Reel of 3000
WCSP (DSBGA) – YZP (Pb-free)
–40°C to 85°C
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
(1)
(2)
(3)
Reel of 3000
Reel of 3000
ORDERABLE PART NUMBER
SN74AUC1G86YZPR
SN74AUC1G86DBVR
SN74AUC1G86DCKR
TOP-SIDE MARKING
(3)
_ _ _UH_
U86_
UH_
Package drawings, thermal data, and symbolization are available at
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
Copyright © 2002–2007, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.