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SN74AUC1G79DBVRG4 参数 Datasheet PDF下载

SN74AUC1G79DBVRG4图片预览
型号: SN74AUC1G79DBVRG4
PDF下载: 下载PDF文件 查看货源
内容描述: 单上升沿触发的D型触发器 [SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP]
分类和应用: 触发器
文件页数/大小: 12 页 / 471 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES387K – MARCH 2002 – REVISED APRIL 2007
FEATURES
Available in the Texas Instruments
NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
I
off
Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max t
pd
of 1.9 ns at 1.8 V
DBV PACKAGE
(TOP VIEW)
Low Power Consumption, 10-µA Max I
CC
±8-mA
Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DRY PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
D
CLK
GND
1
5
V
CC
D
CLK
1
2
3
5
V
CC
2
GND
4
4
Q
V
CC
EW
I
CLK
2
V
5
NC
E
R
4
Q
GND
P
3
D
1
6
GND
B
A
3 4
2
1 5
Y
V
CC
3
Q
See mechanical drawings for dimensions.
NC – No internal connection
DESCRIPTION/ORDERING INFORMATION
This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V
CC
, but is designed
specifically for 1.65-V to 1.95-V V
CC
operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the
rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without
affecting the levels at the outputs.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
–40°C to 85°C
SON – DRY
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
(1)
(2)
(3)
Reel of 3000
Reel of 5000
Reel of 3000
Reel of 3000
ORDERABLE PART
NUMBER
SN74AUC1G79YZPR
SN74AUC1G79DRYR
SN74AUC1G79DBVR
SN74AUC1G79DCKR
TOP-SIDE MARKING
(3)
_ _ _UR_
PREVIEW
U79_
UR_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at
DBV/DCK/DRY: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2007, Texas Instruments Incorporated