SN54BCT652, SN74BCT652
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS038A – AUGUST 1989 – REVISED NOVEMBER 1993
FUNCTION TABLE
INPUTS
OEAB
L
L
X
H
L
L
L
L
H
H
H
OEBA
H
H
H
H
X
L
L
L
H
H
L
CLKAB
H or L
↑
↑
↑
H or L
↑
X
X
X
H or L
H or L
CLKBA
H or L
↑
H or L
↑
↑
↑
X
H or L
X
X
H or L
SAB
X
X
X
X‡
X
X
X
X
L
H
H
SBA
X
X
X
X
X
X‡
L
H
X
X
H
Input
Input
Input
Input
Unspecified‡
Output
Output
Output
Input
Input
Output
DATA I/O†
A1 THRU A8
B1 THRU B8
Input
Input
Unspecified‡
Output
Input
Input
Input
Input
Output
Output
Output
OPERATION OR FUNCTION
Isolation
Store A and B data
Store A, hold B
Store A in both registers
Hold A, store B
Store B in both registers
Real-time B data to A bus
Stored B data to A bus
Real-time A data to B bus
Stored A data to B bus
Stored A data to B bus and
stored B data to A bus
† The data output functions may be enabled or disabled by a variety of level combinations at the OEAB or OEBA inputs. Data input functions are
always enabled; i.e., data at the bus pins is stored on every low-to-high transition on the clock inputs.
‡ Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered in order to load both registers.
logic symbol
§
OEBA
OEAB
CLKBA
SBA
CLKAB
SAB
21
3
23
22
1
2
EN1 [BA]
EN2 [AB]
C4
G5
C6
G7
≥1
1
6D
1
A2
A3
A4
A5
A6
A7
A8
5
6
7
8
9
10
11
7
7
19
18
17
16
15
14
13
B2
B3
B4
B5
B6
B7
B8
5
5 1
≥1
2
4D
20
B1
A1
4
§ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, NT, and W packages.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
2–3
TI [ TEXAS INSTRUMENTS ]
