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SN74F175NSR 参数 Datasheet PDF下载

SN74F175NSR图片预览
型号: SN74F175NSR
PDF下载: 下载PDF文件 查看货源
内容描述: 翻两番D型触发器与Clear [QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR]
分类和应用: 触发器锁存器逻辑集成电路光电二极管
文件页数/大小: 12 页 / 360 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SN74F175
QUADRUPLE D-TYPE FLIP-FLOP
WITH CLEAR
SDFS058B – D293, MARCH 1987 – REVISED MAY 2002
D
D
D
Contains Four Flip-Flops With Double-Rail
Outputs
Buffered Clock and Direct Clear Inputs
Applications Include:
– Buffer/Storage Registers
– Shift Registers
– Pattern Generators
D, N, OR NS PACKAGE
(TOP VIEW)
description
This positive-edge-triggered flip-flop utilizes TTL
circuitry to implement D-type flip-flop logic with a
direct clear (CLR) input. Information at the data
(D) inputs meeting setup-time requirements is
transferred to outputs on the positive-going edge
of the clock pulse. Clock triggering occurs at a
particular voltage level and is not directly related
to the transition time of the positive-going pulse.
When the clock (CLK) input is at either the high or
low level, the D-input signal has no effect at the
output.
ORDERING INFORMATION
TA
PDIP – N
0°C to 70°C
SOIC – D
SOP – NS
PACKAGE†
Tube
Tube
Tape and reel
Tape and reel
CLR
1Q
1Q
1D
2D
2Q
2Q
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
4Q
4Q
4D
3D
3Q
3Q
CLK
ORDERABLE
PART NUMBER
SN74F175N
SN74F175D
SN74F175DR
SN74F175NSR
TOP-SIDE
MARKING
SN74F175N
F175
74F175
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
CLR
L
H
H
H
CLK
X
L
D
X
H
L
X
OUTPUTS
Q
L
H
L
Q0
Q
H
L
H
Q0
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
1