SCLS140D − DECEMBER 1982 − REVISED AUGUST 2003
SN54HC373, SN74HC373
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
VCC
S1
RL
PARAMETER
tPZH
ten
1 kΩ
tPZL
tPHZ
tPLZ
1 kΩ
RL
CL
50 pF
or
150 pF
50 pF
50 pF
or
150 pF
S1
Open
Closed
Open
Closed
−−
Open
S2
Closed
Open
Closed
Open
Open
From Output
Under Test
CL
(see Note A)
Test
Point
S2
tdis
tpd or tt
LOAD CIRCUIT
High-Level
Pulse
VCC
50%
tw
50%
0V
VCC
50%
50%
0V
VOLTAGE WAVEFORMS
PULSE DURATIONS
Reference
Input
tsu
Data
Input
50%
10%
90%
tr
50%
th
90%
VCC
0V
VCC
50%
10% 0 V
tf
Low-Level
Pulse
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
VCC
Input
50%
tPLH
In-Phase
Output
50%
10%
tPHL
Out-of-
Phase
Output
90%
50%
10%
tf
90%
tr
tPLH
50%
10%
90%
tr
VOH
VOL
50%
0V
tPHL
90%
VOH
50%
10% V
OL
tf
Output
Control
(Low-Level
Enabling)
tPZL
Output
Waveform 1
(See Note B)
tPZH
Output
Waveform 2
(See Note B)
VCC
50%
50%
0V
tPLZ
≈V
CC
50%
10%
tPHZ
50%
90%
VOH
≈0
V
≈V
CC
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR
≤
1 MHz, ZO = 50
Ω,
tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
TI [ TEXAS INSTRUMENTS ]
