SINGLE SCHMITT-TRIGGER INVERTER
SCES218T – APRIL 1999 – REVISED FEBRUARY 2007
www.ti.com
ORDERING INFORMATION
T
A
PACKAGE
(1)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZV (Pb-free)
SON-DRY
–40°C to 85°C
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
SOT (SOT-553) – DRL
(1)
(2)
Reel of 3000
Reel of 3000
Reel of 5000
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
Reel of 4000
ORDERABLE PART NUMBER
SN74LVC1G14YZPR
SN74LVC1G14YZVR
SN74LVC1G14DRYR
SN74LVC1G14DBVR
SN74LVC1G14DBVT
SN74LVC1G14DCKR
SN74LVC1G14DCKT
SN74LVC1G14DRLR
TOP-SIDE MARKING
(2)
_ _ _CF_
____
CF
CF_
C14_
CF_
CF_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK/DRL/DRY: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
•
= Pb-free).
YZV: The actual top-side marking is on two lines. Line 1 has four characters to denote year, month, day, and assembly/test site. Line 2
has two characters which show the family and function code. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
•
= Pb-free).
FUNCTION TABLE
INPUT
A
H
L
OUTPUT
Y
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
(DBV, DCK, DRL, DRY, and YZP Package)
A
2
4
Y
LOGIC DIAGRAM (POSITIVE LOGIC)
(YZV Package)
A
1
3
Y
2