SN74LVC3G04
TRIPLE INVERTER GATE
SCES363H − AUGUST 2001 − REVISED SEPTEMBER 2003
D
Available in the Texas Instruments
D
D
D
D
D
D
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NanoStar and NanoFree Packages
Supports 5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 4.1 ns at 3.3 V
Low Power Consumption, 10-µA Max I
CC
±24-mA
Output Drive at 3.3 V
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
>2 V at V
CC
= 3.3 V, T
A
= 25°C
I
off
Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
DCT OR DCU PACKAGE
(TOP VIEW)
1A
3Y
2A
GND
1
2
3
4
8
7
6
5
V
CC
1Y
3A
2Y
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
GND
2A
3Y
1A
4 5
3 6
2 7
1 8
2Y
3A
1Y
V
CC
description/ordering information
This triple inverter is designed for 1.65-V to 5.5-V V
CC
operation. The SN74LVC3G04 performs the Boolean
function Y = A.
ORDERING INFORMATION
TA
PACKAGE†
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SSOP − DCT
VSSOP − DCU
Reel of 3000
Reel of 3000
Reel of 250
Reel of 3000
SN74LVC3G04YEPR
SN74LVC3G04YZPR
SN74LVC3G04DCTR
SN74LVC3G04DCUR
SN74LVC3G04DCUT
C04_
C04_ _ _
ORDERABLE
PART NUMBER
SN74LVC3G04YEAR
SN74LVC3G04YZAR
_ _ _CC_
TOP-SIDE
MARKING‡
−40°C to 85°C
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb,
•
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
TI [ TEXAS INSTRUMENTS ]
