欢迎访问ic37.com |
会员登录 免费注册
发布采购

SN75C3222DBR 参数 Datasheet PDF下载

SN75C3222DBR图片预览
型号: SN75C3222DBR
PDF下载: 下载PDF文件 查看货源
内容描述: 3V至5.5V多通道RS - 232兼容线路驱动器/接收器 [3-V TO 5.5-V MULTICHANNEL RS-232 COMPATIBLE LINE DRIVER/RECEIVER]
分类和应用: 驱动器
文件页数/大小: 14 页 / 260 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号SN75C3222DBR的Datasheet PDF文件第2页浏览型号SN75C3222DBR的Datasheet PDF文件第3页浏览型号SN75C3222DBR的Datasheet PDF文件第4页浏览型号SN75C3222DBR的Datasheet PDF文件第5页浏览型号SN75C3222DBR的Datasheet PDF文件第6页浏览型号SN75C3222DBR的Datasheet PDF文件第7页浏览型号SN75C3222DBR的Datasheet PDF文件第8页浏览型号SN75C3222DBR的Datasheet PDF文件第9页  
SN65C3222, SN75C3222
3 V TO 5.5 V MULTICHANNEL RS 232 COMPATIBLE LINE DRIVER/RECEIVER
SLLS534B − MAY 2002 − REVISED OCTOBER 2004
D
D
D
D
D
D
D
Operates With 3-V to 5.5-V V
CC
Supply
Operates Up To 1 Mbit/s
Low Standby Current . . . 1
µA
Typ
External Capacitors . . . 4
×
0.1
µF
Accepts 5-V Logic Input With 3.3-V Supply
RS-232 Bus-Pin ESD Protection Exceeds
±15
kV Using Human-Body Model (HBM)
Applications
− Battery-Powered Systems, PDAs,
Notebooks, Laptops, Palmtop PCs, and
Hand-Held Equipment
DB, DW, OR PW PACKAGE
(TOP VIEW)
EN
C1+
V+
C1−
C2+
C2−
V−
DOUT2
RIN2
ROUT2
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PWRDOWN
V
CC
GND
DOUT1
RIN1
ROUT1
NC
DIN1
DIN2
NC
description/ordering information
NC − No internal connection
The SN65C3222 and SN75C3222 consist of two line drivers, two line receivers, and a dual charge-pump circuit
with
±15-kV
ESD protection pin to pin (serial-port connection pins, including GND). The devices provide the
electrical interface between an asynchronous communication controller and the serial-port connector. The
charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices
operate at data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/µs to 150 V/µs.
The SN65C3222 and SN75C3222 can be placed in the power-down mode by setting PWRDOWN low, which
draws only 1
µA
from the power supply. When the devices are powered down, the receivers remain active while
the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is
disabled, V+ is lowered to V
CC
, and V− is raised toward GND. Receiver outputs also can be placed in the
high-impedance state by setting EN high.
ORDERING INFORMATION
TA
SOIC (DW)
−0°C to 70°C
−0 C 70 C
SSOP (DB)
TSSOP (PW)
SOIC (DW)
−40 C 85°C
−40°C to 85 C
SSOP (DB)
TSSOP (PW)
PACKAGE†
Tube of 25
Reel of 2000
Reel of 2000
Tube of 70
Reel of 2000
Tube of 25
Reel of 2000
Reel of 2000
Tube of 70
Reel of 2000
ORDERABLE
PART NUMBER
SN75C3222DW
SN75C3222DWR
SN75C3222DBR
SN75C3222PW
SN75C3222PWR
SN65C3222DW
SN65C3222DWR
SN65C3222DBR
SN65C3222PW
SN65C3222PWR
CB3222
65C3222
CB3222
CA3222
75C3222
CA3222
TOP-SIDE
MARKING
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2004, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
1