SN54BCT541, SN74BCT541A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS011E – JULY 1988 – REVISED MARCH 2003
PARAMETER MEASUREMENT INFORMATION
7 V (tPZL, tPLZ, O.C.)
Open
(all others)
S1
From Output
Under Test
CL
(see Note A)
R1
Test
Point
R1
From Output
Under Test
CL
(see Note A)
R2
RL = R1 = R2
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
High-Level
Pulse
(see Note B)
3V
1.5 V
tw
0V
tsu
Data Input
(see Note B)
1.5 V
th
3V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
Low-Level
Pulse
1.5 V
1.5 V
0V
3V
1.5 V
0V
Timing Input
(see Note B)
3V
1.5 V
3V
Input
(see Note B)
tPLH
In-Phase
Output
(see Note D)
tPHL
Out-of-Phase
Output
(see Note D)
1.5 V
3V
1.5 V
1.5 V
0V
tPHL
VOH
1.5 V
1.5 V
VOL
tPLH
VOH
1.5 V
VOL
Waveform 2
(see Notes C and D)
Waveform 1
(see Notes C and D)
Output
Control
(low-level enable)
tPZL
1.5 V
1.5 V
1.5 V
0V
tPLZ
3.5 V
VOL
tPHZ
tPZH
VOH
1.5 V
0.3 V
0V
0.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, tr = tf
≤
2.5 ns, duty cycle = 50%.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
E. When measuring propagation delay times of 3-state outputs, switch S1 is open.
F. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
4
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