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SNJ54LVCH245AJ 参数 Datasheet PDF下载

SNJ54LVCH245AJ图片预览
型号: SNJ54LVCH245AJ
PDF下载: 下载PDF文件 查看货源
内容描述: 八路总线收发器与3态输出 [OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS]
分类和应用: 总线收发器输出元件
文件页数/大小: 28 页 / 1032 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SN54LVCH245A, SN74LVCH245A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCES008O – JULY 1995 – REVISED DECEMBER 2005
FEATURES
Operate From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t
pd
of 6.3 ns at 3.3 V
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
>2 V at V
CC
= 3.3 V, T
A
= 25°C
Support Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
SN54LVCH245A . . . J OR W PACKAGE
SN74LVCH245A . . . DB, DGV, DW, NS,
OR PW PACKAGE
(TOP VIEW)
I
off
Supports Partial-Power-Down Mode
Operation
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
SN54LVCH245A . . . FK PACKAGE
(TOP VIEW)
SN74LVCH245A . . . RGY PACKAGE
(TOP VIEW)
V
CC
DIR
A2
A1
DIR
V
CC
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
1
20
19
OE
18
B1
17
B2
16
B3
15
B4
14
B5
13
B6
12
B7
A1
A2
A3
A4
A5
A6
A7
A8
2
3
4
5
6
7
8
9
10
11
A3
A4
A5
A6
A7
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
OE
B1
B2
B3
B4
B5
GND
DESCRIPTION/ORDERING INFORMATION
The SN54LVCH245A octal bus transceiver is designed for 2.7-V to 3.6-V V
CC
operation, and the
SN74LVCH245A octal bus transceiver is designed for 1.65-V to 3.6-V V
CC
operation.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
These devices are designed for asynchronous communication between data buses. These devices transmit data
from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control
(DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input
circuit and is not disabled by OE or DIR.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
B8
Copyright © 1995–2005, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
A8
GND
B8
B7
B6