272
273
282
283
526
NEQ_NEQ
FULL_NEQ
FULL_NSP
NSP_ACTIVE
ACTIVE_VIDEO
frame_size = 1000001101; 525d
field_size = 00100000111; 263d
It can be seen this corresponds to the frame format shown, with 263 lines in digital field1 and 262 lines in digital field2.
4.8 D/A Conversion
THS8200 contains 3 DACs with an internal resolution of 11 bits, and maximum speed of 205 MSPS. This allows
operation with all (H)DTV formats including 1080P, and PC graphics formats up to UXGA at 75 Hz.
The DAC output compliance can be selected between two full-scale ranges using the data_fsadj register. DIGMUX
selects DTG output data during nonvideo line types, except when dtg1_passthrough is active: in this case video input
data still is passed during the active video portion of certain line types, as identified in Section 4.7.3 on the DTG line
types.
THS8200 supports output in either RGB or YPbPr color spaces. When using RGB output, the dtg2_rgb_mode_on
register needs to be set. In this case an offset is added to all DAC output channels in order to provide headroom for
the negative sync. Nominally the blanking level is at 350 mV, and the 700 mV swing extends upwards. Therefore peak
white corresponds to 1.05 V. When YPbPr mode is selected on this register, the offset is only added to the Y channel
output; Pb and Pr outputs now have a video range from 0 to 700 mV with 0 V corresponding to internal DAC input
code 0 (note that due to the CSM block this could correspond to another device input code). The Cb and Cr chroma
difference channels are thus assumed to be offset binary encoded, not 2s complement.
Finally, the DTG mode determines whether the DIGMUX switches in output data from the DTG. For example, in VESA
mode the DACs are always driven by the video input bus. When the DTG overrides the video input bus in SDTV or
HDTV modes, the actual amplitude levels output by the DACs during this time are user-programmable via the
dtg1_<y,cbcr>_blank , dtg1_<y, cbcr>_sync_low, and dtg1_<y, cbcr>_high registers.
We next outline some of the analog component video output formats that can be generated from THS8200.
4.8.1
RGB Output Without Sync Signal Insertion/General-Purpose Application DAC
In this mode, no sync signal is inserted on any of the analog outputs. HS_OUT and VS_OUT signals are generated
for output video synchronization. This mode is commonly used in computer graphics video output.
Two levels of full-scale output can be selected by software. For video applications, the nominal voltage levels are
0.7 V and 1.305 V.
For component video applications, the nominal voltage level is 0.7 V; 1.305 V is used in NTSC/PAL composite video
display. For composite video applications, the digital video stream must be encoded in an external digital NTSC/PAL
encoder. The THS8200 only converts the digital composite signal to analog composite video. Figure 4–39 illustrates
analog outputs without sync insertion.
When the THS8200 is programmed in this mode, it can also be used as a general-purpose DAC due to the linear
response to the DAC input codes. Optionally, the CSM block can be bypassed to avoid any processing on the device
input codes.
4–35
TI [ TEXAS INSTRUMENTS ]
