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TL16PNP100A 参数 Datasheet PDF下载

TL16PNP100A图片预览
型号: TL16PNP100A
PDF下载: 下载PDF文件 查看货源
内容描述: STANDALONE PLUG -AND- PLAY (即插即用)控制器 [STANDALONE PLUG-AND-PLAY (PnP) CONTROLLER]
分类和应用: 控制器
文件页数/大小: 20 页 / 282 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TL16PNP100A
STANDALONE PLUG-AND-PLAY (PnP) CONTROLLER
SLLS200C – MARCH 1995 – REVISED SEPTEMBER 1997
D
D
D
D
D
D
D
D
D
description
The TL16PNP100A responds to the plug-and-
play (PnP) autoconfiguration process. The
process puts all PnP cards in a configuration
mode, isolates one PnP card at a time, assigns a
card-select number (CSN), and reads the card
resource-data structure from the ST93C56/66
EEPROM. After the resource requirements and
D0
capabilities are determined for all cards, the
D1
process uses the CSN to configure the card by
D2
writing to the configuration registers. The
D3
TL16PNP100A implements configuration regis-
GND
ters only for I/O applications with two logical
D4
devices, and DMA application support is not
NC
provided. Finally, the process activates the
D5
TL16PNP100A card and removes it from
D6
configuration mode. After the configuration
D7
process, the logic function can then start
GND
responding to industry standard architecture
(ISA) bus cycles. The controller disables the
IRQ3
EEPROM interface after the configuration is
complete to allow another on-board controller to
access the EEPROM.
PT PACKAGE
(TOP VIEW)
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
36
35
34
33
32
31
30
29
28
27
26
25
AEN
IOR
IOW
RESET
NC
VCC
A0
A1
A2
A3
A4
A5
IRQ4
IRQ5
IRQ6
IRQ7
IRQ9
CS1
INTR1
VCC
SCLK
SCS
SIO
PnP Card Autoconfiguration Sequence
Compliant
Supports Two Logical Devices
Decodes 10-Bit I/O Address Location With
Programmable 1-, 2-, 4-, 8-, 16-Byte Block
Size
Maps Interrupts to Six Interrupt Outputs
IRQ3– IRQ7 and IRQ9
Provides Simple 3-Terminal Interface to
SGS-Thomson EEPROM 2K/4K ST93C56/66
or Equivalent
3-State Output EEPROM Interface Allows
the EEPROM to be Accessed by Another
Controller
Provides Direct Connection to ISA/AT Bus
Data and Interrupt Signals Require No
Buffer
Available in 44-Pin Plastic Leaded Chip
Carrier (PLCC) and 48-Pin TQFP Package
FN PACKAGE
(TOP VIEW)
D0
D1
D2
D3
GND
D4
D5
D6
D7
GND
IRQ3
AEN
IOR
IOW
RESET
VCC
A0
A1
A2
A3
A4
A5
6 5 4
7
8
9
10
11
12
13
14
15
16
3 2 1 44 43 42 41 40
39
38
37
36
35
34
33
32
31
30
17
29
18 19 20 21 22 23 24 25 26 27 28
A6
A7
A8
A9
A10
A11
GND
CLK
INTR0
CS0
EEPROM
A6
A7
A8
A9
NC
A10
A11
GND
CLK
INTR0
CS0
EEPROM
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
©
1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
IRQ4
IRQ5
IRQ6
IRQ7
IRQ9
CS1
INTR1
NC
VCC
SCLK
SCS
SIO
1