TL16PNP550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH PLUG-AND-PLAY (PnP) AND AUTOFLOW CONTROL
SLLS190B – MARCH 1995 – REVISED MARCH 1996
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PnP Card Autoconfiguration Sequence
Compliant
External Terminal-to-Bypass PnP
Autoconfiguration Sequence
In UART Bypass Mode, the Stand-Alone
PnP Controller is Configured With One
Logical Device
Provides 10-Interrupts IRQ3 – IRQ7,
IRQ9– IRQ12, IRQ15
Simple 3-Pin Interface to SGS-Thomson™
EEPROM 2K/4K ST93C56/66
High Output Current Drive. No External
Buffer Needed for Data and Interrupt
Signals
Programmable Auto-RTS and Auto-CTS
In Auto-CTS Mode, CTS Controls
Transmitter
In Auto-RTS Mode, Receiver FIFO Contents
and Threshold Control RTS
The Serial and Modem Control Outputs
Drive a 1-Meter RJ11 Cable Directly if
Equipment Is on the Same Power Drop
Capable of Running With All Existing
TL16C450 Software
After Reset, All Registers Are Identical to
the TL16C450 Register Set
Clock Prescalar Allows 22-MHz Oscillator
Clock to be Divided by 12, 6, 3, or 1
In the TL16C450 Mode, Hold and Shift
Registers Eliminate the Need for Precise
Synchronization Between the CPU and
Serial Data
Programmable Baud Rate Generator Allows
Division of Any Input Reference Clock by 1
to (2
16
– 1) and Generates an Internal 16×
Clock
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On-Chip I/O Port Address Decoding
In PnP Bypass Mode, 6 External Terminals
Configure the I/O Base Address and
Interrupt Mapping
Adds or Deletes Standard Asynchronous
Communication Bits (Start, Stop, and
Parity) to or From the Serial Data Stream
Independent Control of Transmit, Receive,
Line Status, and Data Set Interrupts on
Each Channel
Programmable Serial Interface
Characteristics:
– 5-, 6-, 7-, or 8-Bit Characters
– Even-, Odd-, or No-Parity-Bit Generation
and Detection
– 1-, 1 1/2-, or 2-Stop Bit Generation
– Baud Generation (DC to 1 Mbit Per
Second)
False Start Bit Detection
Complete Status Reporting Capabilities
3-State Outputs Provide TTL Drive for
Bidirectional Data Bus and Interrupt Lines
Line Break Generation and Detection
Internal Diagnostic Capabilities:
– Loopback Controls for Communications
Link Fault Isolation
– Break, Parity, Overrun, and Framing
Error Simulation
Fully Prioritized Interrupt System Controls
Modem Control Functions (CTS, RTS, DSR,
DTR, RI, and DCD)
Transmitter and Receiver Run at the Same
Speed
Up to 16-MHz Clock Rate for Up to 1-Mbaud
Operation for the Internal ACE
Available in 68-Pin PLCC
description
The TL16PNP550A is a functional upgrade of the TL16C550C asynchronous communications element (ACE),
which in turn is a functional upgrade of the TL16C450. Functionally equivalent to the TL16C450 on power up
(character or TL16C450 mode), the TL16PNP550A, like the TL16C550C, can be placed in an alternate mode
(FIFO mode). This relieves the CPU of excessive software overhead by buffering received and transmitted
characters. The receiver and transmitter FIFOs store up to 16 bytes including three additional bits of error status
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SGS-Thomson is a trademark of SGS-Thomson Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1996, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
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