TLC5940
www.ti.com
SLVS515A – DECEMBER 2004 – REVISED AUGUST 2005
DEVICE INFORMATION (continued)
TERMINAL FUNCTION
TERMINAL
NAME
BLANK
DCPRG
GND
GSCLK
IREF
NC
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
SCLK
SIN
SOUT
VCC
VPRG
XERR
XLAT
NO.
DIP
23
19
22
18
20
–
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
25
26
17
21
27
16
24
PWP
2
26
1
25
27
–
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
4
5
24
28
6
23
3
RHB
31
25
30
24
26
12, 13,
28, 29
4
5
6
7
8
9
10
11
14
15
16
17
18
19
20
21
1
2
23
27
3
22
32
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
O
I
I
O
I
I
I
G
I
I
Blank all outputs. When BLANK = H, all OUTn outputs are forced OFF. GS counter is also
reset. When BLANK = L, OUTn are controlled by grayscale PWM control.
Switch DC data input. When DCPRG = L, DC is connected to EEPROM. When DCPRG = H,
DC is connected to the DC register.
DCPRG is also controls EEPROM writing, when VPRG = V
(PRG)
Ground
Reference clock for grayscale PWM control
Reference current terminal
No connection
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Constant current output
Serial data shift clock
Serial data input
Serial data output
Power supply voltage
Multifunction input pin. When VPRG = GND, the device is in GS mode. When VPRG = V
CC
, the
device is in DC mode. When VPRG = V
(PRG)
, DC register data can programmed into DC
EEPROM with DCPRG=HIGH.
Error output. XERR is an open-drain terminal. XERR goes L when LOD or TEF is detected.
Data latch. Note that the internal connections are switched by VPRG. At XLAT↑ (VPRG =
GND), GS register gets new data. At XLAT↑ (VPRG = V
CC
), DC register gets new data.
I/O
DESCRIPTION
7