SLVS839B – JULY 2008 – REVISED OCTOBER 2008
......................................................................................................................................................
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
(1)
T
J
–40°C to 150°C
(1)
(2)
PACKAGE
8 pin SOIC
SWITCHING FREQUENCY
570 kHz
PART NUMBER
(2)
TPS54331D
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
The D package is also available taped and reeled. Add an R suffix to the device type (i.e., TPS54331DR). See applications section of
data sheet for layout information.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
VIN
EN
Input Voltage
BOOT
VSENSE
COMP
SS
BOOT-PH
Output Voltage
PH
PH (10 ns transient from ground to negative peak)
EN
Source Current
BOOT
VSENSE
PH
VIN
Sink Current
COMP
SS
Electrostatic Discharge (HBM)
Electrostatic Discharge (CDM)
Operating Junction Temperature
Storage Temperature
(1)
–0.3 to 30
–0.3 to 5
38
–0.3 to 3
–0.3 to 3
–0.3 to 3
8
–0.6 to 30
–5
100
100
10
9
9
100
200
2
500
–40 to 150
–65 to 150
µA
mA
µA
A
A
µA
kV
V
°C
°C
V
V
UNIT
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) (3)
PACKAGE DISSIPATION RATINGS
(1)
PACKAGE
SOIC8
(1)
(2)
THERMAL IMPEDANCE JUNCTION TO
AMBIENT
100 °C/W
PSEUDO THERMAL IMPEDANCE JUNCTION TO
TOP
5 °C/W
(3)
Maximum power dissipation may be limited by overcurrent protection
Power rating at a specific ambient temperature T
A
should be determined with a junction temperature of 150°C. This is the point where
distortion starts to substantially increase. Thermal management of the PCB should strive to keep the junction temperature at or below
150°C for best performance and long-term reliability. See
power dissipation estimate
in application section of this data sheet for more
information.
Test board conditions:
a. 2 inches x 1.5 inches, 2 layers, thickness: 0.062 inch
b. 2-ounce copper traces located on the top and bottom of the PCB
c. 6 thermal vias located under the device package
2
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