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TPS61170DRVR 参数 Datasheet PDF下载

TPS61170DRVR图片预览
型号: TPS61170DRVR
PDF下载: 下载PDF文件 查看货源
内容描述: 1.2A高电压升压转换器2x2mm2 QFN封装 [1.2A High Voltage Boost Converter in 2x2mm2 QFN Package]
分类和应用: 转换器稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管升压转换器
文件页数/大小: 27 页 / 953 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SLVS789A – NOVEMBER 2007 – REVISED FEBRUARY 2008
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
(1)
T
A
–40°C to 85°C
(1)
(2)
PACKAGE
(2)
TPS61170DRV
PACKAGE MARKING
BZS
For the most current package and ordering information, see the TI Web site at
The DRV package is available in tape and reel. Add R suffix (TPS61170DRVR) to order quantities of 3000 parts per reel or add T suffix
(TPS61170DRVT) to order 250 parts per reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
Supply Voltages on VIN
V
I
Voltages on CTRL
(2)
Voltage on FB and COMP
(2)
Voltage on SW
P
D
T
J
T
STG
(1)
(2)
(2)
(2)
(1)
VALUE
–0.3 to 20
–0.3 to 20
–0.3 to 3
–0.3 to 40
See Dissipation Rating Table
–40 to 150
–65 to 150
UNIT
V
V
V
V
°C
°C
Continuous Power Dissipation
Operating Junction Temperature Range
Storage Temperature Range
Stresses beyond those listed under
absolute maximum ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS
BOARD PACKAGE
Low-K
(1)
DRV
High-K
(1)
(2)
(2)
R
θJC
20°C/W
20°C/W
R
θJA
140°C/W
65°C/W
DERATING FACTOR
ABOVE T
A
= 25°C
7.1 mW/°C
15.4 mW/°C
T
A
< 25°C
715 mW
1540 mW
T
A
= 70°C
395 mW
845 mW
T
A
= 85°C
285 mW
615 mW
DRV
The JEDEC low-K (1s) board used to derive this data was a 3in×3in, two-layer board with 2-ounce copper traces on top of the board.
The JEDEC high-K (2s2p) board used to derive this data was a 3in×3in, multilayer board with 1-ounce internal power and ground planes
and 2-ounce copper traces on top and bottom of the board.
RECOMMENDED OPERATING CONDITIONS
MIN
V
I
V
O
L
C
I
C
O
T
A
T
J
(1)
Input voltage range, VIN
Output voltage range
Inductor
(1)
Input capacitor
Output capacitor
Operating ambient temperature
Operating junction temperature
3
VIN
10
1
1
–40
–40
10
85
125
TYP
MAX
18
38
22
UNIT
V
V
µH
µF
µF
°C
°C
These values are recommended values that have been successfully tested in several applications. Other values may be acceptable in
other applications but should be fully tested by the user.
2
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Copyright © 2007–2008, Texas Instruments Incorporated