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SLVS754 – MARCH 2007
RECOMMENDED OPERATING CONDITIONS (continued)
MIN
C
in1-2
C
OUT1
C
OUT2-3
I
LDO1
I
LDO2,3
T
A
T
J
R
CC
(2)
Input capacitor at VINLDO1, VINLDO2/3
(1)
Output capacitor at VLDO1
Output current at VLDO1
Output current at VLDO2,3
Operating ambient temperature range
Operating junction temperature range
Resistor from battery voltage to V
CC
used for filtering
(2)
–40
–40
1
(1)
NOM
MAX
UNIT
µF
µF
µF
2.2
4.7
2.2
400
200
85
125
10
Output capacitor at VLDO2-3
(1)
mA
mA
°C
°C
Ω
Up to 2 mA can flow into V
CC
when both converters are running in PWM, this resistor causes the UVLO threshold to be shifted
accordingly.
ELECTRICAL CHARACTERISTICS
V
cc
= VINDCDC1/2 = 3.6V, EN = V
cc
, MODE = GND, L = 2.2µH, C
OUT
= 22µF, T
A
= –40°C to 85°C typical values
are at T
A
= 25°C (unless otherwise noted).
PARAMETER
SUPPLY CURRENT
V
cc
Input voltage range
One converter, I
OUT
= 0 mA.PFM mode enabled (Mode =
GND) device not switching,
EN_DCDC1 = Vin OR EN_DCDC2 = Vin;
EN_LDO1= EN_LDO2 = EN_LDO3 = GND
Operating quiescent current
Total current into V
CC
, VINDCDC1/2,
VINLDO1, VINLDO2/3
Two converters, I
OUT
= 0 mA, PFM mode enabled (Mode =
0) device not switching,
EN_DCDC1 = Vin AND EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
One converter, I
OUT
= 0 mA, PFM mode enabled (Mode =
GND) device not switching,
EN_DCDC1 = Vin OR EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = Vin
One converter, I
OUT
= 0 mA, Switching with no load (Mode
= Vin), PWM operation
EN_DCDC1 = Vin OR EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
Two converters, I
OUT
= 0 mA, Switching with no load (Mode
= Vin), PWM operation
EN_DCDC1 = Vin AND EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
EN_DCDC1 = EN_DCDC2 = GND
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
Voltage at V
CC
2.5
6.0
V
µA
TEST CONDITIONS
MIN
TYP
MAX
UNIT
20
30
I
Q
32
40
µA
145
210
µA
0.85
mA
I
Q
Operating quiescent current into V
CC
1.25
mA
I
(SD)
V
(UVLO)
Shutdown current
Undervoltage lockout threshold for
DCDC converters and LDOs
9
1.8
12
2.0
µA
V
EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2, EN_LDO3, MODE
V
IH
V
IL
I
IN
High-level input voltage
Low-level input voltage
Input bias current
MODE, EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2,
EN_LDO3
MODE, EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2,
EN_LDO3
MODE, EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2,
EN_LDO3, MODE = GND or VIN
1.2
0
0.01
V
CC
0.4
1.0
V
V
µA
POWER SWITCH
r
DS(on)
I
LD_PMOS
r
DS(on)
I
LK_NMOS
I
(LIMF)
P-channel MOSFET on
resistance
P-channel leakage current
N-channel MOSFET on
resistance
N-channel leakage current
Forward Current Limit
PMOS (High-Side) and
NMOS (Low side)
DCDC1
DCDC2
DCDC1,
DCDC2
DCDC1,
DCDC2
VINDCDC1/2 = 3.6 V
VINDCDC1/2 = 2.5 V
V
(DS)
= 6 V
VINDCDC1/2 = 3.6 V
VINDCDC1/2 = 2.5 V
V
(DS)
= 6.0 V
2.5 V
≤
V
IN
≤
6.0 V
1.19
0.85
220
320
7
1.4
1.0
10
1.65
1.15
A
280
400
1
450
630
mΩ
µA
mΩ
µA
3
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