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TPS70145, TPS70148
TPS70151, TPS70158
TPS70102
SLVS222D – DECEMBER 1999 – REVISED NOVEMBER 2004
DEVICE INFORMATION (continued)
Adjustable Voltage Version
V
IN1
(2 Pins)
UVLO
2.5 V
GND
Shutdown
Current
Sense
V
OUT1
(2 Pins)
ENA_1
−
Thermal
Shutdown
Reference
V
ref
V
ref
+
ENA_1
FB1
(see Note
A)
PG1
FB1
0.95
×
V
ref
Rising Edge
Deglitch
V
IN1
Shutdown
UV Comp
FB2
0.83
×
V
ref
FB1
0.83
×
V
ref
UV Comp
EN
V
CC
Falling Edge
Deglitch
FB2
0.95
×
V
ref
Power
Sequence
Logic
ENA_1
ENA_2
MR2
PG1 Comp
Rising Edge
Deglitch
Falling Edge
Delay
V
IN1
RESET
Falling Edge
Deglitch
V
ref
MR1
−
+
ENA_2
ENA_2
FB2
(see Note
A)
V
OUT2
(2 Pins)
SEQ
(see Note B)
V
IN2
(2 Pins)
Current
Sense
A.
For most applications, FB1 and FB2 should be externally connected to resistor dividers as close as possible to the
device. For other implementations, refer to FB terminals connection discussion in the
Application Information
section.
If the SEQ terminal is floating at the input, V
OUT2
powers up first
B.
7
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