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TSB43DA42AGHC 参数 Datasheet PDF下载

TSB43DA42AGHC图片预览
型号: TSB43DA42AGHC
PDF下载: 下载PDF文件 查看货源
内容描述: IEEE 1394A -2000消费电子解决方案 [IEEE 1394a-2000 CONSUMER ELECTRONICS SOLUTION]
分类和应用: 驱动器微控制器和处理器串行IO控制器通信控制器外围集成电路电子数据传输PC时钟
文件页数/大小: 7 页 / 158 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SLLS560 – FEBRUARY 2007
IEEE 1394a-2000 CONSUMER ELECTRONICS SOLUTION
FEATURES
1394 Features
– Integrated 400/200/100 Mbps 2-Port PHY
– Compliant to IEEE 1394-1995 and IEEE
1394a-2000 Standards
– Supports Bus Manager Functions and
Automatic 1394 Self-ID Verification
– Separate Asyncchronous Ack FIFOs
Decrease the Ack-Tracking Burden on
External CPU
DTLA Encryption Support for MPEG2-DVB,
DSS, and Audio Data (TSB43DA42 Only)
– Support for up to Three
Encrypted/Decrypted Streams at One Time
– Full Ake Performed With Hardware Assist
– Secure Method for Loading DTLA
Information Using Ex-CPU Interface
Audio and Video Interfaces
– Three Configurable High-Speed Data Ports
for Video Data
– Two Ports Configurable as Parallel or
Serial
– One Port Serial Only
– Two Interfaces for Audio Data (Only One
Audio Stream Supported at a Time)
– 60958 Port
– I2S-Style DAC Interface for PCM Data
(Two Channel)
– Pass-Through Modes for HSDI0 and HSDI1
– Packet Insertion – Two Insertion Buffers
per HSDI
– PID Filtering (32 PID Filters per HSDI Port)
External CPU Interfaces
– Motorola 68K-Style 16-Bit Asynchronous
Interface (Supports External DMA Only)
– SRAM-Like 16-Bit Asynchronous Interface
(Supports External DMA Only)
– PCI Interface (33 MHz) Compliant to PCI
Specification Version 2.2 (Supports PCI
Slave and Master Function)
Data Buffers
– 3x 4K Byte Isochronous Buffers for Audio
and Video Data
– 2x 2K Byte Asynchronous/Asynchronous
Stream Transmit Buffers
– 2x 2K Byte Asynchronous/Asynchronous
Stream Receive Buffers
– 1x 1K Byte Self-ID Buffer
– Insertion Buffers for MPEG2 Packet
Insertion (DAT, PMT, SIT, and DIT)
– Programmable Data/Space Available
Indicators for Buffer Flow Control
Hardware Packet Formatting for the Following
Standards
– IEC61883-1 (General)
– IEC61883-2 (SD-DVCR)
– IEC61883-4 (MPEG2-TS)
– IEC61883-6 (Audio and Music)
– IEC61883-7 (ITU-R BO.1294 System B) –
DSS
– Asynchronous Packets
– Asynchronous Streams
– PHY Packets (Including Self-IDs)
Additional Features
– JTAG Interface to Support Post-Assembly
Scan of Device I/O – Boundary Scan
– Unique Binding Method for Protecting
Sensitive Off-Chip Data From Ex-CPU
Interface
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated