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UC1823A, UC2823A, UC2823B,
UC3823A, UC3823B, UC1825A,
UC2825A, UC2825B, UC3825A, UC3825B
SLUS334C − AUGUST 1995 − REVISED AUGUST 2004
CONTROL METHODS
Current Mode
Voltage Mode
UDG−95110
UDG−95109
.
Figure 8. Control Methods
SYNCHRONIZATION
The oscillator can be synchronized by an external pulse inserted in series with the timing capacitor. Program the free
running frequency of the oscillator to be 10% to 15% slower than the desired synchronous frequency. The pulse width
should be greater than 10 ns and less than half the discharge time of the oscillator. The rising edge of the CLK/LEB pin
can be used to generate a synchronizing pulse for other chips. Note that the CLK/LEB pin no longer accepts an incoming
synchronizing signal.
UDG−95111
UDG−95113
Figure 9. General Oscillator Synchronization
Figure 10. Two Unit Interface
UDG−95112
Figure 11. Operational Waveforms
9
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