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UC3827N-1 参数 Datasheet PDF下载

UC3827N-1图片预览
型号: UC3827N-1
PDF下载: 下载PDF文件 查看货源
内容描述: 降电流/电压馈送推挽PWM控制器 [Buck Current/Voltage Fed Push-Pull PWM Controllers]
分类和应用: 控制器
文件页数/大小: 15 页 / 279 K
品牌: TI [ TEXAS INSTRUMENTS ]
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UC1827-1, UC1827-2
UC2827-1, UC2827-2
UC3827-1, UC3827-2
www.ti.com
SLUS365A – APRIL 1999 – REVISED AUGUST 2005
BUCK CURRENT/VOLTAGE FED PUSH-PULL
PWM CONTROLLERS
FEATURES
Ideal for Multiple Output and/or High
Voltage Output Voltage Converters
Up to 500 kHz Operation
High Voltage, High Current Floating
Driver for Buck Converter Stage
UC3827-1 Current Fed Controller has
Push-Pull Drivers with Overlapping
Conduction Periods
UC3827-2 Voltage Fed Controller has
Push-Pull Drivers with Nonoverlapping
Conduction Periods
Average Current Mode, Peak Current
Mode or Voltage Mode with Input
Voltage Feedforward Control for Buck
Power Stage
Wide Bandwidth, Low Offset,
Differential Current Sense Amplifier
Precise Short Circuit Current Control
DESCRIPTION
The UC3827 family of controller devices provides an
integrated control solution for cascaded buck and
push-pull converters. These converters are known as
current fed or voltage fed push-pull converters and
are ideally suited for multiple output and/or high
voltage output applications. In both current fed and
voltage fed modes, the push-pull switches are driven
at 50% nominal duty cycles and at one half the
switching frequency of the buck stage. In the current
fed mode, the two switches are driven with a speci-
fied over-lap period to prevent ringing and voltage
stress on the devices. In the voltage fed mode, the
two switches are driven with a specified gap time
between the switches to prevent shorting the trans-
former across the energy storage capacitor and to
prohibit excessive currents flowing through the de-
vices.
The converter's output voltage is regulated by pulse
width modulation of the buck switch. The UC3827
contains complete protection and PWM control func-
tions for the buck converter. Easy control of the
floating switch is accomplished by the floating drive
circuitry. The gate drive waveform is level shifted to
support an input voltage up to 72 V
DC
.
BLOCK DIAGRAM
VEAOCEA+
10
Voltage Error
Amplifier
12
CEAO
6
RAMP
5
VEA+
VEA−
CEA−
CSAO
CSA+
CSA−
SS
SYNC
CT
RT
REF
VCC
GND
14
16
13
7
8
9
4
19
18
17
15
23
11
REF
&
UVLO UVLO
OSC
500 kHz
MAX
+3 V
ILIM Comparator
Current Sense
Amplifier
SS
INHBT
UV
Current Error
Amplifier
0.7 V
+
PWM Comparator
RD
S
Q
Flying
Driver
1
2
3
V+
BUCK
SRC
PGND
OSC
21
Q
T
Q
DELAY
Push/Pull
Drivers
24
PUSH
PULL
DELAY
22
20
DELAY
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2005, Texas Instruments Incorporated