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UC3907N 参数 Datasheet PDF下载

UC3907N图片预览
型号: UC3907N
PDF下载: 下载PDF文件 查看货源
内容描述: 负载共享调节控制器\n [Load-Sharing Regulation Controller ]
分类和应用: 电源电路电源管理电路光电二极管控制器
文件页数/大小: 7 页 / 271 K
品牌: TI [ TEXAS INSTRUMENTS ]
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UC1907
UC2907
UC3907
Load Share Controller
FEATURES
Fully Differential High Impedance
Voltage Sensing
Accurate Current Amplifier for Precise
Current Sharing
Opto Coupler Driving Capability
1.25% Trimmed Reference
Master Status Indication
4.5V TO 35V Operation
DESCRIPTION
The UC3907 family of Load Share Controller ICs provides all the necessary
features to allow multiple independent power modules to be paralleled such
that each module supplies only its proportionate share to total load current.
This sharing is accomplished by controlling each module’s power stage
with a command generated from a voltage feedback amplifier whose refer-
ence can be independently adjusted in response to a common share bus
voltage. By monitoring the current from each module, the current share bus
circuitry determines which paralleled module would normally have the high-
est output current and, with the designation of this unit as the master, ad-
justs all the other modules to increase their output current to within 2.5% of
that of the master.
The current share bus signal interconnecting all the paralleled modules is a
low-impedance, noise-insensitive line which will not interfere with allowing
each module to act independently should the bus become open or shorted
to ground. The UC3907 controller will reside on the output side of each
power module and its overall function is to supply a voltage feedback loop.
The specific architecture of the power stage is unimportant. Either switch-
ing or linear designs may be utilized and the control signal may be either di-
rectly coupled or isolated though the use of an opto coupler or other
isolated medium.
Other features of the UC3907 include 1.25% accurate reference: a
low-loss, fixed gain current sense amplifier, a fully differential,
high-impedance voltage sensing capability, and a status indicator to desig-
nate which module is performing as master.
BLOCK DIAGRAM
VOLTAGE ERROR AMPLIFIER
V
CC
12 COMP
DRIVE
1.75V
1.0V AMPLIFIER
+
DRV
1k
20k
50k
8
ISET
9
OPTO DRIVE
(+) SENSE 11
VCC (4.5V TO 35V)
10
+
0.25V
GROUND
AMPLIFIER
+
V
REF
1.750V
+
(–) SENSE
POWER RTN
ARTIFICIAL GND
VREF
C/S OUT
4
5
6
7
1
GND
+
14 ADJ OUT
ADJUST
AMPLIFIER
17.5k
ADJ
50mV
13 ADJ INPUT
+
+
40k
CURRENT SENSE
AMPLIFIER
BUFFER
AMPLIFIER
100
2k
C/S (–)
C/S (+)
3
2k
2
+
40k
+
10k
15 CURRENT SHARE BUS
16 STATUS INDICATE
UDG-99052
SLUS165 - MARCH 1999